ARM VERSION 1.2 Computer Hardware User Manual


 
Writing ARM and Thumb Assembly Language
2-40 Copyright © 2000, 2001 ARM Limited. All rights reserved. ARM DUI 0068B
2.8.1 ARM LDM and STM instructions
The load (or store) multiple instruction loads (stores) any subset of the 16
general-purpose registers from (to) memory, using a single instruction.
Syntax
The syntax of the
LDM
instructions is:
LDM{cond}address-mode Rn{!},reg-list{^}
where:
cond
is an optional condition code. Refer to Conditional execution on
page 2-20 for more information.
address-mode
specifies the addressing mode of the instruction. Refer to LDM and STM
addressing modes on page 2-41 for details.
Rn
is the base register for the load operation. The address stored in this
register is the starting address for the load operation. Do not specify r15
(pc) as the base register.
!
specifies base register write back. If this is specified, the address in the
base register is updated after the transfer. It is decremented or
incremented by one word for each register in the register list.
register-list
is a comma-delimited list of symbolic register names and register ranges
enclosed in braces. There must be at least one register in the list. Register
ranges are specified with a dash. For example:
{r0,r1,r4-r6,pc}
Do not specify writeback if the base register
Rn
is in
register-list
.
^
You must not use this option in User or System mode. For details of its
use in privileged modes, see the Handling Processor Exceptions chapter
in ADS Developer Guide and LDM and STM on page 4-18.
The syntax of the
STM
instruction corresponds exactly, except for some details in the
effect of the
^
option.