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Schematic Diagrams
Intel Debug Card & Fan Control B - 19
B.Schematic Diagrams
Intel Debug Card & Fan Control
5VS
3V S
5V S
3VS
5VS_VFAN
CPU_VTT
3V S
5V S_C F AN 5VS
5V S
5VS
3V S
5V S
5VS_SFAN
5VS_CFAN
5VS_RFAN
5VS_RFAN
5VS_VFAN
5VS_SFAN
5V S
5VS
HWRST #4,1 6
H_CPURST#4,1 2
ICH_VRM_PWRGD12,16
H_PWR GD4,12,16
EXT_TBG_AK3612
SCLK7. .9,12,16 , 19 ,32
SDATA7..9 ,1 2,1 6,19,3 2
CK _H_BC L K_ I TP _ DP4
CK _H_BC L K_ I TP _ DN4
H_MBP_ N[7 :0]4
H_PRD Y_N4
H_PREQ_N4
H_TDO4
H_TCK4
H_TDI4
H_TMS4
H_TRST_N4
CPU_TAPGOOD4
RAM_FAN28
RAM_FANSEN28
VGA_FAN28
VGA_FANSEN28
5VS12,17,20..23,27,29..31,43
CPU_ V T T4,5,15,39,44
CPU_FANSEN28
CPU_FAN28
3VS7..9,12,13,15..17,19..30,32,39,41,43
SY S_FAN28
HWR ST#
SCLK
H_PWR GD
CK_H_ BCLK_I TP_D N
CK_H_ BCLK_I TP_D P
CPU_TAPGOOD
H_TCK
H_TDI
H_TDO
H_TMS
H_TRST_N
H_PREQ_N
H_MBP_ N[7 :0]
H_PRD Y_N
H_CPURST#
EXT_TBG_AK36
ICH_VRM_PWRGD
SDATA
CPU_ HOOK1 _XDP
PRI_PWRG D_ XDPH_ PWRGD
F PG A _H_CP URS T_ NH_ CPURST #
ICH_VRM_PWRGD
RAM_FON#RAM_FON#
VGA_FON#
VGA_FON#
H_ TMS
H_ TCK
H_MBP_ N0
H_MBP_ N2
H_MBP_ N5
H_ TDO
SCLK
HWRST #
SDATA
H_MBP_ N3
H_ TDI
EXT_TBG_AK36
CK_H_ BCLK_I TP_D P
H_MBP_ N7
H_MBP_ N1
H_MBP_ N4
FPGA_H_CPURST_N
CK_H_ BCLK_I TP_D N
CP U_HOOK 1_ XDP
H_PREQ_N
PRI_PWRG D_XDP
H_ TRST_ N
CP U_T A PG OOD
H_MBP_ N6
H_PRD Y_N
CPU_FON#
CPU_FON#
SYS_FANSEN
SY S_FON# SYS_FON#
C1 78
10 U _1 0V _08
D23 S CS 355 V
AC
R349 4.7K_04
R4 11
* 0 _04
C585
.1U_16 V _04
J_DDRFAN1
8 5205- 030 01
1
2
3
U25
A PE 887 2
3
5
2
1
4
6
7
8
VOUT
GND
VIN
FON
VSET
GND
GND
GND
D1 *S CS 3 55V
AC
C382
1 0U _ 10V _0 8
D11 SC S355V
AC
XDP1
*XDP
43
44
3
5
9
11
15
17
21
23
27
29
33
35
51
53
4
6
10
12
16
18
22
24
28
30
34
36
55
57
52
54
56
58
39
41
45
47
40
42
46
1
7
13
19
25
31
37
49
59
2
8
14
20
26
32
38
50
60
48
VCC_OBS_AB
VCC_OBS_C D
OB SF N _A 0
OB SF N _A 1
OBSD ATA_A_0
OBSD ATA_A_1
OBSD ATA_A_2
OBSD ATA_A_3
OB SF N _B 0
OB SF N _B 1
OBSD ATA_B_0
OBSD ATA_B_1
OBSD ATA_B_2
OBSD ATA_B_3
SDA
SCL
OB SF N _C 0
OB SF N _C 1
OBSD ATA_C_0
OBSD ATA_C_1
OBSD ATA_C_2
OBSD ATA_C_3
OB SF N _D 0
OB SF N _D 1
OBSD ATA_D_0
OBSD ATA_D_1
OBSD ATA_D_2
OBSD ATA_D_3
TC K 1
TC K 0
TDO
TRSTN
TDI
TMS
HOOK0
HOOK1
HOOK2
HOOK3
ITPC LK/H OOK4
IT P CLK * /HOOK 5
RESET*/HOOK6
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND_XDP_PRESENT*
DBR* /H OOK7
R250 1K_04
J_SYSFAN1
8 5205- 030 01
1
2
3
R251 1K_04
R249 0_0 4
R232 4. 7K _04
C3 84
10 U _1 0V _08
R2 34
* 0 _04
R2 *4.7K_ 04
R2 30
*0_04
C3 81
.1U_ 16V _0 4
U13
A PE 887 2
3
5
2
1
4
6
7
8
VOUT
GND
VIN
FON
VSET
GND
GND
GND
C386
.1U_16 V _04
J_VGAFAN1
85 205-03 001
1
2
3
U1 0
APE8872
3
5
2
1
4
6
7
8
VOUT
GND
VIN
FON
VSET
GND
GND
GND
U12
APE8872
3
5
2
1
4
6
7
8
VOUT
GND
VIN
FON
VSET
GND
GND
GND
C383
10U_10 V _08
D2 SC S 355 V
AC
J_ CPUFAN1
8 5205-0 300 1
1
2
3
R2 33
* 0 _04
R1 4.7K_04
C385
.1U_16 V_ 04
External Connection
????????, ??QPI???Intel ????
CPU FAN CONTROL
RAM FAN CONTROL
J_DDRFAN1
3
1
VGA FAN CONTROL
J_VGAFAN1
3
1
Intel Debug Card
3
J_CPUFAN1
1
J_SYSFAN1
1
SYS FAN CONTROL
3
Sheet 18 of 47
Intel Debug Card &
Fan Control