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A–2 Alpha Instruction Set
21264/EV68A Hardware Reference Manual
Alpha Instruction Summary
Qualifiers for operate instructions are shown in Table A–2. Qualifiers for IEEE and
VAX floating-point instructions are shown in Tables A–5 and A–6, respectively.
Memory/ branch Mbr oo.h oo is the 6-bit opcode field.
h is the high-order 2 bits of the displacement field.
Operate Opr oo.ff oo is the 6-bit opcode field.
ff is the 7-bit function code field.
PALcode Pcd oo oo is the 6-bit opcode field; the particular PAL-
code instruction is specified in the 26-bit function
code field.
Table A–2 Architecture Instructions
Mnemonic Format Opcode Description
ADDF F-P 15.080 Add F_floating
ADDG F-P 15.0A0 Add G_floating
ADDL Opr 10.00 Add longword
ADDL/V Opr 10.40 Add longword with integer overflow enable
ADDQ Opr 10.20 Add quadword
ADDQ/V Opr 10.60 Add quadword with integer overflow enable
ADDS F-P 16.080 Add S_floating
ADDT F-P 16.0A0 Add T_floating
AMASK Opr 11.61 Architecture mask
AND Opr 11.00 Logical product
BEQ Bra 39 Branch if = zero
BGE Bra 3E Branch if ≥ zero
BGT Bra 3F Branch if > zero
BIC Opr 11.08 Bit clear
BIS Opr 11.20 Logical sum
BLBC Bra 38 Branch if low bit clear
BLBS Bra 3C Branch if low bit set
BLE Bra 3B Branch if ≤ zero
BLT Bra 3A Branch if < zero
BNE Bra 3D
Branch if
≠
zero
BR Bra 30 Unconditional branch
Table A–1 Instruction Format and Opcode Notation (Continued)
Instruction Format
Format
Symbol
Opcode
Notation Meaning