Compaq ECQD2KCTE Laptop User Manual


 
4–74 Alpha Architecture Handbook
Condition 3 allows an OS completion handler to emulate the trigger instruction with its origi-
nal input operand values.
Condition 4 allows the handler to re-execute instructions in the trap shadow with their original
operand values.
Condition 5 prevents any unusual side effects that would cause problems on repeated execu-
tion of the instructions in the trap shadow.
Conditions:
1. The destination register of the trigger instruction may not be used as the destination reg-
ister of any instruction in the trap shadow.
2. The trap shadow may not include any branch or jump instructions.
3. An instruction in the trap shadow may not modify an input to the trigger instruction.
4. The value in a register or memory location that is used as input to some instruction in
the trap shadow may not be modified by a subsequent instruction in the trap shadow
unless that value is produced by an earlier instruction in the trap shadow.
5. The trap shadow may not contain any instructions with side effects that interact with
earlier instructions in the trap shadow or with other parts of the system. Examples of
operations with prohibited side effects are:
Modifications of the stack pointer or frame pointer that can change the accessibility
of stack variables and the exception context that is used by earlier instructions in
the trap shadow.
Modifications of volatile values and access to I/O device registers.
If order of exception reporting is important, taking an arithmetic trap by an integer
instruction or by a floating-point instruction that does not include a /S qualifier,
either of which can report exceptions out of order.
An instruction may be in the trap shadows of multiple instructions that include a /S qualifier.
That instruction must obey all conditions for all those trap shadows. For example, the destina-
tion register of an instruction in multiple trap shadows must be different than the destination
registers of each possible trigger instruction.
4.7.7.3.2 Trap Shadow Length Rules
The trap shadow length rules in Table 4–10 apply only to those floating-point instructions with
any valid qualifier combination that includes a /S trap qualifier. Further, the instruction to
which the trap shadow extends is not part of the trap shadow and that instruction is not exe-
cuted prior to the arithmetic trap that is signaled by the trigger instruction.
Implementation notes:
On Alpha implementations for which the IMPLVER instruction returns the value 0, the
trap shadow of an instruction may extend after the result is consumed by a float-
ing-point STx instruction. On all other implementations, the trap shadow ends when a
result is consumed.
Because Alpha implementations need not execute instructions that have R31 or F31 as
the destination operand, instructions with such an destination should not be thought to
end a trap shadow.