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4–118 Alpha Architecture Handbook
4.10.13 Convert Integer to IEEE Floating
Format:
Operation:
Fc ← {conversion of Fbv<63:0>}
Exceptions:
Instruction mnemonics:
Qualifiers:
Description:
The two’s-complement operand in register Fb is converted to a single- or double-precision
floating result and written to register Fc. The conversion complements a number if negative,
normalizes it, rounds to the target precision, and packs the result with an appropriate sign and
exponent field. Register Fa must be F31.
See Section 4.7.7 for details of the stored result on inexact result.
Notes:
• In order to use CVTQS or CVTQT with exception completion handling, it is necessary
to specify the /SUI IEEE trap mode, even though an underflow trap is not possible.
CVTQy Fb.rq,Fc.wx
!Floating-point Operate format
Inexact Result
CVTQS Convert Quadword to S_floating
CVTQT Convert Quadword to T_floating
Rounding: Dynamic (/D)
Minus infinity (/M)
Chopped (/C)
Trapping: Exception Completion (/S)
Inexact Enable (/I)