Compaq ECQD2KCTE Laptop User Manual


 
A–12 Alpha Architecture Handbook
The standard NOP forms are:
NOP == BIS R31,R31,R31
FNOP == CPYS F31,F31,F31
These generate no exceptions. In most implementations, they should encounter no operand
issue delays and no destination issue delay. Implementations are free to optimize these into no
action and zero execution cycles.
A.4.4.2 Clear a Register
The standard clear register forms are:
CLR == BIS R31,R31,Rx
FCLR == CPYS F31,F31,Fx
These generate no exceptions. In most implementations, they should encounter no operand
issue delays and no functional unit issue delay.
A.4.4.3 Load Literal
The standard load integer literal (ZEXT 8-bit) form is:
MOV #lit8,Ry == BIS R31, lit8, Ry
The Alpha literal construct in Operate instructions creates a canonical longword constant for
values 0..255.
A longword constant stored in an Alpha 64-bit register is in canonical form when bits
<63:32>=bit <31>.
A canonical 32-bit literal can usually be generated with one or two instructions, but sometimes
three instructions are needed. Use the following procedure to determine the offset fields of the
instructions:
val = <sign-extended, 32-bit value>
low = val <15:0>
tmp1 = val - SEXT(low) ! Account for LDA instruction
high = tmp1 <31:16>
tmp2 = tmp1 - SHIFT_LEFT( SEXT(high,16) )
if tmp2 NE 0 then
! original val was in range 7FFF8000
16
..7FFFFFFF
16
extra = 4000
16
tmp1 = tmp1 - 40000000
16
high = tmp1 <31:16>
else
extra = 0
endif