Compaq ECQD2KCTE Laptop User Manual


 
B–1
Appendix B
IEEE Floating-Point Conformance
A subset of IEEE Standard for Binary Floating-Point Arithmetic (ANSI/IEEE Standard
754-1985) is provided in the Alpha floating-point instructions. This appendix describes how to
construct a complete IEEE implementation.
The order of presentation parallels the order of the IEEE specification.
B.1 Alpha Choices for IEEE Options
Alpha supports IEEE single, double, and optionally (in software) extended double formats.
There is no hardware support for the optional extended double format.
Alpha hardware supports normal and chopped IEEE rounding modes. IEEE plus infinity and
minus infinity rounding modes can be implemented in hardware or software.
Alpha hardware does not support optional IEEE software trap enable/disable modes. See the
following discussion about software support.
Alpha hardware supports add, subtract, multiply, divide, convert between floating formats,
convert between floating and integer formats, compare, and square root. Software routines sup-
port remainder, round to integer in floating-point format, and convert binary to/from decimal.
In the Alpha architecture, copying without change of format is not considered an operation.
(LDx, CPYSx, and STx do not check for non-finite numbers; an operation would.) Compilers
may generate ADDx F31,Fx,Fy to get the opposite effect.
Optional operations for differing formats are not provided.
The Alpha choice is that the accuracy provided by conversions between decimal strings and
binary floating-point numbers will meet or exceed IEEE standard requirements. It is imple-
mentation dependent whether the software binary/decimal conversions beyond 9 or 17 digits
treat any excess digits as zeros.