Compaq ECQD2KCTE Laptop User Manual


 
IEEE Floating-Point Conformance B–7
Figure B–2: IEEE Trap Handling Behavior
The IEEE-specified trap behavior occurs only with respect to the user signal handler (the last
layer in Figure B–2); any trap-and-fixup behavior in the first three layers is outside the scope
of the IEEE standard.
The IEEE number system is divided into finite and non-finite numbers:
The finites are normal numbers:
–MAX..–MIN, –0, 0, +MIN..+MAX
The non-finites are:
Denormals, +/– Infinity, Signaling NaN, Quiet NaN
Alpha hardware must treat minus zero operands and results as special cases, as required by the
IEEE standard.
If the DNZ (denormal operands to zero) bit in the FPCR is set or if the OS completion handler
is treating denormal operands as zero, then IEEE trap handling is done as if each denormal
operand had the corresponding signed zero value.
Table B–2 specifies, for the IEEE /S qualifier modes, which layer does each piece of trap han-
dling. The table describes where the hardware and PALcode can trap to the OS completion
handler. However, for IEEE operations with any valid qualifier combination that includes the
/S qualifier, the system may choose not to trap to the OS completion handler, provided that any
applicable exception is disabled by the trap disable bits in the FPCR and the hardware and
PALcode can produce the expected IEEE result as modified by the denormal control bits in the
FPCR. See Section 4.7.8 for more detail on the hardware instruction descriptions.
Hardware
PALcode
User Signal Handler
Traps to PALcode
Traps to Operating System
Traps to User IEEE Trap Handler
(IEEE Standard)
Operating System