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2–12 Alpha Architecture Handbook
Note:
Alpha implementations will impose a significant performance penalty when accessing
longwords that are not naturally aligned. (A naturally aligned longword datum has zero as
the low-order two bits of its address.)
2.2.8 Quadword Integer Format in Floating-Point Unit
A quadword integer operand occupies 64 bits in memory, arranged as shown in Figure 2–21.
Figure 2–21: Quadword Integer Datum
A quadword integer operand occupies 64 bits in a floating register, arranged as shown in Fig-
ure 2–22.
Figure 2–22: Quadword Integer Floating-Register Format
There is no explicit quadword load or store instruction; the T_floating load/store instructions
are used to move quadword data between memory and the floating registers. (The ITOFT and
FTOIT are used to move quadword data between integer and floating registers.)
The T_floating load instruction performs no bit reordering on input. The T_floating store
instruction performs no bit reordering on output. This instruction does no checking of the data;
when used to store quadwords, the preceding operation should have specified a quadword
result.
Note:
Alpha implementations will impose a significant performance penalty when accessing
quadwords that are not naturally aligned. (A naturally aligned quadword datum has zero as
the low-order three bits of its address.)
2.2.9 Data Types with No Hardware Support
• The following VAX data types are not directly supported in Alpha hardware. Octaword
• H_floating
• D_floating (except load/store and convert to/from G_floating)
• Variable-Length Bit Field
• Character String
S
:A
:A+4
Integer Lo
Integer Hi
0
31 30
0
6362
S
32 31
Integer Hi Integer Lo :Fx