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4–4 Alpha Architecture Handbook
4.2 Memory Integer Load/Store Instructions
The instructions in this section move data between the integer registers and memory.
They use the Memory instruction format. The instructions are summarized in Table 4–2.
Table 4–2: Memory Integer Load/Store Instructions
Mnemonic Operation
LDA Load Address
LDAH Load Address High
LDBU Load Zero-Extended Byte from Memory to Register
LDL Load Sign-Extended Longword
LDL_L Load Sign-Extended Longword Locked
LDQ Load Quadword
LDQ_L Load Quadword Locked
LDQ_U Load Quadword Unaligned
LDWU Load Zero-Extended Word from Memory to Register
STB Store Byte
STL Store Longword
STL_C Store Longword Conditional
STQ Store Quadword
STQ_C Store Quadword Conditional
STQ_U Store Quadword Unaligned
STW Store Word