4–8 Alpha Architecture Handbook
4.2.3 Load Unaligned Memory Data into Integer Register
Format:
Operation:
va ← {{Rbv + SEXT(disp)} AND NOT 7}
Ra ← (va)<63:0>
Exceptions:
Instruction mnemonics:
Qualifiers:
Description:
The virtual address is computed by adding register Rb to the sign-extended 16-bit displace-
ment, then the low-order three bits are cleared. The source operand is fetched from memory
and written to register Ra.
LDQ_U Ra.wq,disp.ab(Rb.ab)
!Memory format
Access Violation
Fault on Read
Translation Not Valid
LDQ_U Load Unaligned Quadword from Memory to Register
None