Compaq ECQD2KCTE Laptop User Manual


 
Instruction Descriptions 4–23
The design in Table 4–4 allows specification of the low 16 bits of a likely longword target
address (enough bits to start a useful I-cache access early), and also allows distinguishing call
from return (and from the other two less frequent operations).
Note that the above information is used only as a hint; correct setting of these bits can improve
performance but is not needed for correct operation. See Section A.2.2 for more information on
branch prediction.
An unconditional long jump can be performed by:
JMP R31,(Rb),hint
Coroutine linkage can be performed by specifying the same register in both the Ra and Rb
operands. When disp<15:14> equals ‘10’ (RET) or ‘11’ (JSR_COROUTINE) (that is, the tar-
get address prediction, if any, would come from a predictor implementation stack), then bits
<13:0> are reserved for software and must be ignored by all implementations. All encodings
for bits <13:0> are used by Compaq software or Reserved to Compaq, as follows:
Table 4–4: Jump Instructions Branch Prediction
disp<15:14> Meaning
Predicted
Target<15:0>
Prediction
Stack Action
00 JMP PC + {4*disp<13:0>}
01 JSR PC + {4*disp<13:0>} Push PC
10 RET Prediction stack Pop
11 JSR_COROUTINE Prediction stack Pop, push PC
Encoding Meaning
0000
16
Indicates non-procedure return
0001
16
Indicates procedure return
All other encodings are reserved to Compaq.