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S1C88650 TECHNICAL MANUAL EPSON 85
5 PERIPHERAL CIRCUITS AND THEIR OPERATION (Clock Timer)
5.9.4 Programming notes
(1) The clock timer is actually made to RUN/STOP
in synchronization with the falling edge of the
256 Hz signal after writing to the TMRUN
register. Consequently, when "0" is written to
the TMRUN, the timer shifts to STOP status
when the counter is incremented "1". The
TMRUN maintains "1" for reading until the
timer actually shifts to STOP status.
Figure 5.9.4.1 shows the timing chart of the
RUN/STOP control.
Fig. 5.9.4.1 Timing chart of RUN/STOP control
(2) The SLP instruction is executed when the clock
timer is in the RUN status (TMRUN = "1"). The
clock timer operation will become unstable
when returning from SLEEP status. Therefore,
when shifting to SLEEP status, set the clock
timer to STOP status (TMRUN = "0") prior to
executing the SLP instruction.
TMRUN(WR)
TMDX 57H 58H 59H 5AH 5BH 5CH
TMRUN(RD)
256 Hz