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Intel Desktop Board DH55HC Product Guide
48
S/PDIF Header
Figure 23, C shows the location of the S/PDIF output header. Table 7 shows the pin
assignments and signal names for the S/PDIF output header.
Table 7. S/PDIF Header Signal Names
Pin Description
1 Ground
2 S/PDIF Out
3 Key (no pin)
4 +5 VDC
Parallel Port Header
Figure 23, D shows the location of the parallel port header. Table 8 shows the pin
assignments and signal names for the parallel port header.
Table 8. Parallel Port Header
Pin Standard Signal Name ECP Signal Name EPP Signal Name
1 STROBE# STROBE# WRITE#
2 AUTOFD# AUTOFD#, HOSACK DATASTB#
3 PD0 PD0 PD0
4 FAULT# FAULT#, PERIPHREQST# FAULT#
5 PD1 PD1 PD1
6 INT# INT#, REVERSERQST# RESET#
7 PD2 PD2 PD2
8 SLCTIN# SLCTIN# ADDRSTB#
9 PD3 PD3 PD3
10 GROUND GROUND GROUND
11 PD4 PD4 PD4
12 GROUND GROUND GROUND
13 PD5 PD5 PD5
14 GROUND GROUND GROUND
15 PD6 PD6 PD6
16 GROUND GROUND GROUND
17 PD7 PD7 PD7
18 GROUND GROUND GROUND
19 ACK# ACK# INTR
20 GROUND GROUND GROUND
21 BUSY BUSY#, PERIPHACK WAIT#
22 GROUND GROUND GROUND