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µPSD
µPSD
µ
µ
PSD
PSD
Family Growth
Family Growth
•10-bit ADC channels
• Greater accuracy
• Up to 512K byte Main Flash
• Size supports: C/C++, RTOS, GUI,
data recording, look-up tables, load
FPGAs, multi-national products
• Turbo 4-cycle 8032 Core
• 10+ MIPs at 40MHz
• Up from 3 MIPs, 12-cycle core
• Enhanced timer block with six
16-bit capture/compare,
timer/counters, or PWM units
• JTAG Debug and Emulation
• Eliminate external In-Circuit
Emulation Hardware
• Up to 32 MacroCell PLD
• 12 nsec propagation
• Eliminate external CPLDs
• Build custom peripherals
• Build complex glue logic
• USB 1.1 Full-Speed
• 12 Mbits/sec, 5V and 3V
• FIFOs for rapid transfer of bulk data
• 5V tolerant general I/O
• 3V system connects to 5V peripherals
• Up to 32K byte SRAM
• Size supports: C/C++, fast math, buffer
for large fast communication packets
PLD
PLD
PLD
PLD
ANALOG
ANALOG
ANALOG
ANALOG
CPU
CPU
CPU
CPU
SRAM
SRAM
SRAM
SRAM
FLASH
FLASH
FLASH
FLASH
INTERFACE
INTERFACE
INTERFACE
INTERFACE