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up to 16 channels.
0 = Analog Front-End in Differential Mode. This mode supports
up to 8 channels.
UNIBIP
Selects offset configuration for the Analog Front-End.
1 = Analog Front-End Unipolar for selected range
0 = Analog Front-End Bipolar for selected range.
The following table summarizes all possible Offset/Range configurations
:
305 µV8
0-1.25V
111
610 µV4
0-2.5V
011
1.22 mV2
0-5V
101
2.44 mV1
0-10V
001
610 µV8
±
1.25V
110
1.22 mV4
±
2.5 V
010
2.44 mV2
±
5 V
100
4.88 mV1
±
10 V
000
Measurement
Resolution
Input GainInput RangeGS0GS1UNIBIP
ADPS[1:0]
These bits select the ADC Pacer Source. Maximum Internal/External Pacer
frequency is 330 kHz.
External Rising11
External Falling01
82C54 Counter/Timer10
SW Convert00
Pacer SourceADPS0ADPS1
Note: For ADPS[1:0] = 00 case, SW conversions are initiated
via a word write to BADR2 + 0. Data is ‘don't care.’
READ
--------------EOC-
0123456789101112131415
EOC
Real-time, non-latched status of ADC End-of-Conversion signal.
1 = ADC DONE
0 = ADC BUSY
7.3.3 TRIGGER CONTROL/STATUS REGISTER
22