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Philips Semiconductors
User’s Manual - Preliminary -
P89LPC906/907/908
INDEX
2003 Dec 8 109
double buffering in 9-bit mode 67
double buffering in different modes 66
framing error 61, 65
mode 0 63
mode 0 (shift register) 59
mode 1 64
mode 1 (8-bit variable baud rate) 59
mode 2 65
mode 2 (9-bit fixed baud rate) 59
mode 3 65
mode 3 (9-bit variable baud rate) 59
multiprocessor communications 68
status register 63
transmit interrupts with double buffering enabled (modes 1, 2 and 3) 66
W
Watchdog timer 79
feed sequence 80
timer mode 83
watchdog function 79
watchdog timeout values 82
WDCLK = 0 and CPU power down 84