Filter
Top Products
PMC-940402 (R5) ©1998 PMC-Sierra, Inc. October, 1998
PM5355
PMC-Sierra,Inc.
622 Mbit/s SATURN User Network Interface
S/UNI-622
FEATURES
• Monolithic SATURN
®
-compatible
SONET/SDH ATM User Network
Interface (UNI) for LAN, Public UNI, and
Public NNI connections.
• Implements the ATM Transmission
Convergence (TC) sublayer according to
ATM Forum specifications using the
SONET/SDH 622.08 Mbit/s and
155.52 Mbit/s formats.
• Also supports the SONET 51.84 Mbit/s
format.
• Processes all SONET/SDH UNI
overhead.
• Inserts and extracts ATM payloads using
ATM cell delineation.
• Provides a SCI-PHY™-compliant 50 MHz
synchronous 16-bit (4-cell deep) FIFO
buffers in both transmit and receive paths.
• Compatible with ATM Forum UTOPIA
interface format, with support for multi-
PHY applications.
• Provides access to section and line
datalinks and all additional overhead to
allow external processing for full
SONET/SDH Network-Node Interface
(NNI) compliance.
• Provides a generic 8-bit
microprocessor bus interface for
configuration, control, and status
monitoring.
• Provides a standard 5-signal P1149.1
JTAG test port for boundary scan
board test purposes.
• Provides TTL-compatible inputs and
outputs.
• Low power, +5 V CMOS technology.
• Packaged in a 208-pin, 28 mm by
28 mm slugged Plastic Quad Flat Pack
(PQFP) with 0.5 mm pin pitch.
APPLICATIONS
• Workstations and Personal Computer
• LAN Switches and Hubs
• Routers
• Video Servers
• Backbones
• Broadband Switching Systems
• Test Equipment
BLOCK DIAGRAM
D[7:0]
A[7:0]
ALE
CSB
WRB
RDB
INTB
Microprocessor
Interface
RSTB
Byte-
Interleaved
Mux
TPOH
TPOHFP
FPIN
FPOS
PIN[7:0]
FPOUT
TSICLK
TSOUT
POUT[7:0]
OOF
PICLK
Receive
Section
O/H
Processor
TSEN
RSICLK
RSIN
Transmit
Section
O/H
Processor
Parallel
Input/Output
Port
POP[5:0]
PIP[3:0]
Transmit
ATM Cell
Processor
Path
Trace
Buffer
Byte-
Interleaved
Demux
Receive ConCat
Processor
Transmit ConCat
Processor
Transmit Path
O/H Processor
Receive Path
O/H Processor
Receive
Line O/H
Processor
Transmit
Line O/H
Processor
Section
Trace
Buffer
Transport
O/H
Insert
Line Side
Interface
LOS
LOF
RSDCLK, ROWCLK
RSD, RSOW, RSUC
Receive
ATM Cell
Processor
JTAG Test
Access Port
TDO
TDI
TCK
TRSTB
TMS
Transmit
ATM 4-Cell
FIFO
Receive
ATM 4-Cell
FIFO
RSOC
RDAT[15:0]
RXPRTY[1:0]
RCA
TXPRTY[1:0]
TSOC
TDAT[15:0]
RRDENB
RFCLK
TCA
TWRENB
TFCLK
Drop
Side
Interface
RCP
RGFC
LCD
LAIS
LRDI
RLDCLK
RLD, RLOW
RTOH[4:1]
RTOHFP
RTOHCLK
OHFP
RPOH
RPOHFP
RPOHCLK
LOP
PAIS
PRDI
GROCLK
Transport
O/H
Extract
TCP
TGFC
XOFF
TPAIS
TPRDI
TPOHCLK
TPOHEN
TCLK
TFP
GTOCLK
TTOHEN
TTOH[4:1]
TTOHFP
TTOHCLK
TLRDI
TLDCLK
TLD, TLOW
TLAIS
TSDCLK, TOWCLK
TSD, TSOW, TSUC
Path
O/H
Insert
Path O/H
Extract