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datasheet DDR3L SDRAM
Rev. 1.0
Unbuffered DIMM
11.3 AC and DC Logic Input Levels for Differential Signals
11.3.1 Differential Signals Definition
Figure 3. Definition of differential ac-swing and "time above ac level" tDVAC
11.3.2 Differential Swing Requirement for Clock (CK - CK) and Strobe (DQS - DQS)
NOTE :
1. Used to define a differential signal slew-rate.
2. for CK - CK
use V
IH
/V
IL
(AC) of ADD/CMD and V
REFCA
; for DQS - DQS use V
IH
/V
IL
(AC) of DQs and V
REFDQ
; if a reduced ac-high or ac-low level is used for a signal group,
then the reduced level applies also here.
3. These values are not defined, however they single-ended signals CK, CK
, DQS, DQS need to be within the respective limits (V
IH
(DC) max, V
IL
(DC)min) for single-ended sig-
nals as well as the limitations for overshoot and undershoot. Refer to "overshoot and Undersheet Specification"
Symbol Parameter
DDR3-800/1066/1333/1600
unit NOTE1.35V 1.5V
min max min max
V
IHdiff
differential input high +0.18 NOTE 3 +0.20 NOTE 3 V 1
V
ILdiff
differential input low NOTE 3 -0.18 NOTE 3 -0.20 V 1
V
IHdiff
(AC)
differential input high ac
2 x (V
IH
(AC) - V
REF
)
NOTE 3
2 x (V
IH
(AC) - V
REF
)
NOTE 3 V 2
V
ILdiff
(AC)
differential input low ac NOTE 3
2 x (V
IL
(AC) - V
REF
)
NOTE 3
2 x (V
IL
(AC) - V
REF
)
V2
0.0
tDVAC
V
IH
.DIFF.MIN
half cycle
Differential Input Voltage (i.e. DQS-DQS, CK-CK)
time
tDVAC
V
IH
.DIFF.AC.MIN
V
IL
.DIFF.MAX
V
IL
.DIFF.AC.MAX