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Unbuffered SODIMM datasheet DDR3 SDRAM
Rev. 1.0
Table Of Contents
204pin Unbuffered SODIMM based on 4Gb A-die
1. DDR3 Unbuffered SODIMM Ordering Information........................................................................................................4
2. Key Features.................................................................................................................................................................4
3. Address Configuration ..................................................................................................................................................4
4. x64 DIMM Pin Configurations (Front side/Back Side)...................................................................................................5
5. Pin Description .............................................................................................................................................................6
6. Input/Output Functional Description..............................................................................................................................7
7. Function Block Diagram:...............................................................................................................................................8
7.1 8GB, 1Gx64 Module (Populated as 2 ranks of x8 DDR3 SDRAMs) .......................................................................8
8. Absolute Maximum Ratings ..........................................................................................................................................9
8.1 Absolute Maximum DC Ratings............................................................................................................................... 9
8.2 DRAM Component Operating Temperature Range ................................................................................................ 9
9. AC & DC Operating Conditions.....................................................................................................................................9
9.1 Recommended DC Operating Conditions (SSTL-15).............................................................................................. 9
10. AC & DC Input Measurement Levels..........................................................................................................................10
10.1 AC & DC Logic Input Levels for Single-ended Signals..........................................................................................10
10.2 V
REF
Tolerances....................................................................................................................................................11
10.3 AC and DC Logic Input Levels for Differential Signals ..........................................................................................12
10.3.1. Differential Signals Definition.........................................................................................................................12
10.3.2. Differential Swing Requirement for Clock (CK-CK
) and Strobe (DQS-DQS) ................................................12
10.3.3. Single-ended Requirements for Differential Signals ......................................................................................13
10.3.4. Differential Input Cross Point Voltage ............................................................................................................14
10.4 Slew Rate Definition for Single Ended Input Signals.............................................................................................14
10.5 Slew rate definition for Differential Input Signals...................................................................................................14
11. AC & DC Output Measurement Levels .......................................................................................................................15
11.1 Single Ended AC and DC Output Levels...............................................................................................................15
11.2 Differential AC and DC Output Levels...................................................................................................................15
11.3 Single-ended Output Slew Rate ............................................................................................................................15
11.4 Differential Output Slew Rate ................................................................................................................................16
12. DIMM IDD specification definition...............................................................................................................................17
13. IDD SPEC Table.........................................................................................................................................................19
14. Input/Output Capacitance...........................................................................................................................................20
14.1 2Rx8 2GB SODIMM ..............................................................................................................................................20
15. Electrical Characteristics and AC timing.....................................................................................................................21
15.1 Refresh Parameters by Device Density.................................................................................................................21
15.2 Speed Bins and CL, tRCD, tRP, tRC and tRAS for Corresponding Bin ................................................................21
15.3 Speed Bins and CL, tRCD, tRP, tRC and tRAS for corresponding Bin.................................................................21
15.3.1. Speed Bin Table Notes..................................................................................................................................25
16. Timing Parameters by Speed Grade ..........................................................................................................................26
16.1 Jitter Notes ............................................................................................................................................................29
16.2 Timing Parameter Notes........................................................................................................................................30
17. Physical Dimensions :.................................................................................................................................................31
17.1 512Mx8 based 1Gx64 Module (2 Ranks) - M471B1G73AH0................................................................................31