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Glossary-2 Copyright © 2006 ARM Limited. All rights reserved. ARM DDI 0389B
Advanced Peripheral Bus (APB)
A simpler bus protocol than AHB. It is designed for use with ancillary or
general-purpose peripherals such as timers, interrupt controllers, UARTs, and I/O ports.
Connection to the main system bus is through a system-to-peripheral bus bridge that
helps to reduce system power consumption.
AHB See Advanced High-performance Bus.
Aligned A data item stored at an address that is divisible by the number of bytes that defines the
data size is said to be aligned. Aligned words and halfwords have addresses that are
divisible by four and two respectively. The terms word-aligned and halfword-aligned
therefore stipulate addresses that are divisible by four and two respectively.
AMBA See Advanced Microcontroller Bus Architecture.
APB See Advanced Peripheral Bus.
Beat Alternative word for an individual transfer within a burst. For example, an INCR4 burst
comprises four beats.
See also Burst.
BE-8 Big-endian view of memory in a byte-invariant system.
See also BE-32, LE, Byte-invariant and Word-invariant.
BE-32 Big-endian view of memory in a word-invariant system.
See also BE-8, LE, Byte-invariant and Word-invariant.
Big-endian Byte ordering scheme in which bytes of decreasing significance in a data word are
stored at increasing addresses in memory.
See also Little-endian and Endianness.
Big-endian memory Memory in which:
• a byte or halfword at a word-aligned address is the most significant byte or
halfword within the word at that address
• a byte at a halfword-aligned address is the most significant byte within the
halfword at that address.
See also Little-endian memory.