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Glossary
Glossary-4 Copyright © 2006 ARM Limited. All rights reserved. ARM DDI 0389B
SBO See Should Be One.
SBZ See Should Be Zero.
SBZP See Should Be Zero or Preserved.
Scan chain A scan chain is made up of serially-connected devices that implement boundary scan
technology using a standard JTAG TAP interface. Each device contains at least one TAP
controller containing shift registers that form the chain connected between TDI and
TDO, through which test data is shifted. Processors can contain several shift registers
to enable you to access selected parts of the device.
Should Be One (SBO)
Should be written as 1 (or all 1s for bit fields) by software. Writing a 0 produces
Unpredictable results.
Should Be Zero (SBZ)
Should be written as 0 (or all 0s for bit fields) by software. Writing a 1 produces
Unpredictable results.
Should Be Zero or Preserved (SBZP)
Should be written as 0 (or all 0s for bit fields) by software, or preserved by writing the
same value back that has been previously read from the same field on the same
processor.
Unaligned A data item stored at an address that is not divisible by the number of bytes that defines
the data size is said to be unaligned. For example, a word stored at an address that is not
divisible by four.
Undefined Indicates an instruction that generates an Undefined instruction trap. See the ARM
Architecture Reference Manual for more information on ARM exceptions.
UNP See Unpredictable.
Unpredictable Means that the behavior of the ETM cannot be relied on. Such conditions have not been
validated. When applied to the programming of an event resource, only the output of
that event resource is Unpredictable.
Unpredictable behavior can affect the behavior of the entire system, because the ETM
is capable of causing the core to enter debug state, and external outputs can be used for
other purposes.
Unpredictable For reads, the data returned when reading from this location is unpredictable. It can have
any value. For writes, writing to this location causes unpredictable behavior, or an
unpredictable change in device configuration. Unpredictable instructions must not halt
or hang the processor, or any part of the system.