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5.8.3 Turning the Module Off
Figure 5.8-3 Power Down timing
The GS64 power down sequence is shown above. The significant signals are VCC,
PON_L and VREF, shown by solid lines. The other signals (in dashed lines) are
internal to the module and are shown for reference purposes only.
With the module powered normally, PON_L is pulled-up to VCC potential. In order to
power down the module, PON_L is pulled to ground. Once PON_L has been held low
for at least 125ms the shut-down procedure begins. Although PON_L can be held
low for longer, it will delay completion of the shut-down event. If the module is
registered on a GSM network, the de-registration process will complete; this may last
between 3 to 30 seconds. The power latch (PWR_KEEP) is released and approximately
70ms later the LDO outputs fall, as indicated by the removal of the VREF output.
Once VREF is no longer present, the application can safely remove VCC.
In order to turn the module off using the PON_H signal, the signal is released. The
power-off timing sequence is the same, provided PON_H remains low.
The RTC can continue to operate even though VCC is removed,
provided that a sufficiently charged backup device is connected to the
VRTC. Refer to section 5.20.1 for details.
The relevant characteristics of the ON/OFF Power control interface are shown in the
table below.
NOTE