Clevo M730T Laptop User Manual


 
Schematic Diagrams
B - 32 Power VCORE
B.Schematic Diagrams
Power VCORE
VIN
PR20 7.5K_1%_04
CS2N
PR14
7.5K _1% _04
SG ND3
PC47
0.033U_16V_X7R_04
SGND3
VC_SS
DRP+
40A
PC20
0.1U_50V_06
PL4
0.5UH_10*10*4.1
PC133
*100P_50V_04
PR19
680_04
H_VID4[3]
VIN
BG2
H_VID0[3]
TRERMAL PAD
PU2
SC452
1
2
3
4
5
6
7
8
9
10
11
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
14
13
12
45
CLKEN#
VREF
HYS
CLSET
VID6
VID5
VID4
VID3
VID2
VID1
VID0
BST2
TG2
DRN2
BG2
V5_2
PSI#
FB+
FB-
DRP-
DR P+
SS
DAC
AGN D
VCCA
ERROUT
CS2+
CS 2-
CS 1-
CS1+
IS H
NC
EN
V5_1
BG1
DRN1
TG1
BST1
VIN1
VPN1
DPR SL
VIN2
VPN2
PWRGD
GND
PC39
0.033U_16V_X7R_04
CPU_VCCSENSE[3]
VCOR E_VREF
PC31
1500P_50V_04
VCOR E
EN_VCOR E
PRT1
100K_NTC_06
12
PR43 47K_04
DRP-
DCR _DR1
CS 1N
DRN 1
PQ41
IRF7832ZTRPBF
4
62
73
8
5
1
PR131 10_04
PR15 0_06
PR37
47K_04
5mil
CS1N
CLKEN#
PR35
28K_1%_04
PC 134 0.022U _16V_X7R _04
PQ38
2N7002W
G
DS
SGND3
PD13
FM0540-N
AC
PC23
1U_25V_08
DRP+
PC33 1000P_50V_X7R_04
5V
PC37 1000P_50V_X7R_04
PQ37
2N7002W
G
DS
PR21
1K _1% _04
5V
SG ND3
H_DPR STP#[2,5,13]
PR122 499_1%_04
PQ36
IRF7413ZPBF
4
62
73
8
5
1
DPRSL_STP
+
PC131
330U_2.5V _D 3
DR N1
+
PC124
330U_2.5V_D3
PC29
0.015U_50V_06
VCCA
PC128
1000P_50V_X7R_04
5V[16,19,21,28..30]
PQ44
IRF7413ZPBF
4
62
73
8
5
1
PR23 220K_1%_04
CS2P
ISH
PC137
*100P_50V_04
PC21
0.1U_50V_06
PD3
FM5822
A C
PR18
130K_1%_04
SGND3
TG1
+
PC123
*330U_2.5V_D3
VIN
3.3VS[5,8..16,18..27]
DRP_L1
PC25 0.1U_25V_X7R_06
PR129 0_06
20A
20A
VCOR E
25mil
E-RC
PC26
*0.022U_16V_X7R _04
DRP-
SGND3
PQ7
*IRF7832ZTRPBF
4
62
73
8
5
1
PR125
100K_04
PR33 10_04
DPRSL
H_VID5[3]
BST2
PR127 *10mil_short
SGND3
PR11 *0_04
Z2802
PR22
130K_1%_04
close to IMVP6
PC32 1U_10V_06
PR27
17.4K_1%_04
PD11
FM0540-N
AC
VCORE_HYS
CS2N
PR44 47K_04
PR38 0_06
PC43
1000P_50V_X7R_04
PR124
*10K_04
DRP_L2
+
PC116
330U_2.5V_D3
PR24
10_06
PC45
1U _25V_08
V-RC2
PR49
100_1%_04
CS1N
PC135
*100P_50V_04
PR32 0_06
+
PC130
* 330U_2.5V _D 3
EN_VCORE
PS I#[2]
BST1
PR12 *0_04
PC59
0.1U _50V_06
5V
PC19
0.1U_50V_06
H_VID1[3]
VCORE[3]
PR 31 * 10m il_shor t
BG1
CLKEN#[15]
PR16 *0_04
PC34 100P_50V_04
PR36
47K_04
DAC
H_VID6[3]
PU1
*74AHCT1G02GW
4
53
1
2
R170 100_1%_04
SGND3
V-RC1
3.3VS
CPU_VSSSENSE[3]
DCR _DR2
PQ39
IRF7832ZTRPBF
4
62
73
8
5
1
PM_DPRSLPVR[5,15]
PC30 100P_50V_04
+
PC129
330U_2.5V _D 3
VIN[12,27..30,32]
BG1
VPN2
DRN 2
FB-
R172
100_1%_04
PQ6
*2N7002W
G
DS
H_VID3[3]
DELAY _PW RGD[5,17]
BG1
PR46
17.4K_1%_04
PR48 0_06
PC27
0.015U_50V_06
PC22
0.1U_50V_06
PR10 0_04
5V
VIN
DPRSL_STP
VC_SS
PR128 *10mil_short
H_VID2[3]
Z2801
VCORE
BG1
PR13 *0_04
PC18
*0.1U_16V_04
PR17 33K_1%_04
PC58
0.1U_50V_06
VCORE_ON[26]
PR28
9.1K_1%_06
PR123
100_1%_04
PC24
1U_10V_06
PD4
FM5822
A C
PL3
0.5UH_10*10*4.1
VCORE_CLSET
+
PC132
15U_25V_D2
FB+
PC41
1U_10V_06
PC28 100P_50V_04
PR29
1K_04
BG1
PRT2
100K_NTC_06
12
CS 2N
D RN1
TG2
PJ6
*OPEN_35mil
PR130
*680_04
PQ8
*IRF7832ZTRPBF
4
62
73
8
5
1
35mil
VCORE_VREF
PC40
680P_50V_X7R_04
SGND3
DPRSL
DR N2
VPN1
PR45
28K_1%_04
+
PC138
15U_25V_D2
3.3VS
PR126 10K_04
Sheet 31 of 40
Power VCORE