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Connect Tech Inc. | FreeForm/Express S6 - PCIe Spartan-6 FMC Carrier | User Manual
Revision 0.01 7
Hardware Description
FPGA
Description
The FreeForm/Express S6 features the Xilinx Spartan-6 LX45T FPGA in a 484 pin BGA package
(Xilinx XC6SLX45T-2FGG484I). The Spartan-6 simplifies FPGA design by providing a
integrated memory controller and PCI express end point, along with high performance general I/O,
clocking, and internal memory resources comparable to be previous generation Virtex-class
FPGAs.
For more details on the Spartan-6 capabilities, visit:
http://www.xilinx.com/products/spartan6/index.htm.
PCI Express Bus
Description
The FreeForm/Express S6 has a single x1 PCIe express lane, connected directly to the Spartan-6
FPGA. The PCIe interface is facilitated by the Spartan-6’s integrated PCI express endpoint.
Memory & Flash
Description
A single 1024 Mbit x16 DDR3 component (Micron MT41J64M16JT-15E) is connected to the
Spartan-6 FPGA, providing 128 MB of high speed memory. The Spartan-6’s integrated memory
controller provides a generic high speed interface to FPGA logic.
In addition, a 16 Mbit SPI flash component (Numonyx M25P16) is connected to the FPGA’s user
I/O for storage of embedded processor code.
Low Pin Count FMC Interface
Description
The FreeForm/Express S6 provides a single Low Pin Count FPGA Mezzanine Card (FMC) Interface.
The LPC connector provides the following features
36 LVDS pairs, 2 designated as global clocks (or 68 2.5V LVCMOS pairs)
I2C interface
1 SERDES TX / RX channel (Rocket I/O , GTP), with clock
Power : +12VDC, +3.3V DC, +2.5V DC
The FreeForm/Express S6 LPC implementation differs from the VITA 57.1 specification as follows:
VADJ is fixed to +2.5 V DC
Only LVDS or 2.5V LVCMOS I/O is supported.