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CY62158E MoBL
®
Document #: 38-05684 Rev. *D Page 7 of 10
Figure 6 shows WE controlled write cycle waveforms.
[12, 16, 17]
Figure 6. Write Cycle No. 1
Figure 7 shows CE
1
or CE
2
controlled write cycle waveforms.
[12, 16, 17]
Figure 7. Write Cycle No. 2
Switching Waveforms (continued)
t
HD
t
SD
t
PWE
t
SA
t
HA
t
AW
t
SCE
t
WC
t
HZOE
VALID DATA
NOTE 18
CE
1
ADDRESS
CE
2
WE
DATA IO
OE
t
WC
VALID DATA
t
AW
t
SA
t
PWE
t
HA
t
HD
t
SD
t
SCE
CE
1
ADDRESS
CE
2
WE
DATA IO
OE
Notes
16.Data IO is high impedance if OE
= V
IH
.
17.If CE
1
goes HIGH or CE
2
goes LOW simultaneously with WE HIGH, the output remains in high impedance state.
18.During this period, the IOs are in output state. Do not apply input signals.
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