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CY7C1410JV18, CY7C1425JV18
CY7C1412JV18, CY7C1414JV18
Document #: 001-12561 Rev. *D Page 23 of 26
Switching Waveforms
Figure 3. Read/Write/Deselect Sequence
[25, 26, 27]
K
1
2
34
5
8
10
6
7
K
RPS
WPS
A
D
READ READ WRITE WRITEWRITE
NOPREAD
WRITE NOP
9
A0
t
KH
t
KHKH
t
KL
t
CYC
tt
HC
t
SA
t
HA
t
SD
t
HD
SC
t
t
SA
t
HA
t
SD
t
HD
A6A5
A3 A4
A1
A2
D30 D50 D51 D61
D31
D11D10 D60
Q
C
C
DON’T CARE
UNDEFINED
t
CQ
CQ
t
KHCH
t
CO
t
KHCH
t
CLZ
CHZ
t
KH
t
KL
Q00 Q01
Q20
t
KHKH
t
CYC
Q21
Q40
Q41
t
CQD
t
DOH
t
CCQO
t
CQOH
t
CCQO
t
CQOH
t
CQDOH
t
CQH
t
CQHCQH
Notes
25.Q00 refers to output from address A0. Q01 refers to output from the next internal burst address following A0, that is, A0+1.
26.Outputs are disabled (High-Z) one clock cycle after a NOP.
27.In this example, if address A2 = A1, then data Q20 = D10 and Q21 = D11. Write data is forwarded immediately as read results. This note applies to the whole diagram.
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