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CY7C1411JV18, CY7C1426JV18
CY7C1413JV18, CY7C1415JV18
Document Number: 001-12557 Rev. *C Page 24 of 28
Switching Waveforms
Figure 5. Read/Write/Deselect Sequence
[27, 28, 29]
K
1
2
345
6
7
RPS
WPS
A
Q
D
C
C
READ
READWRITE WRITE
NOP
NOP
DON’T CARE UNDEFINED
CQ
CQ
K
A0 A1
t
KH
t
KHKH
t
KL
t
CYC
t
t
HC
t
SA
t
HA
A2
SC
tt
HCSC
A3
t
KHCH
t
KHCH
t
CQD
t
CLZ
DOH
t
CHZ
t
t
t
KL
t
CYC
t
CCQO
t
CCQO
t
CQOH
t
CQOH
KHKH
KH
Q00
Q03
Q01 Q02
Q20
Q23
Q21
Q22
t
CO
t
CQDOH
t
t
CQH
t
CQHCQH
D10 D11
D12
D13
t
SD
t
HD
t
SD
t
HD
D30 D31
D32
D33
Notes
27. Q00 refers to output from address A0. Q01 refers to output from the next internal burst address following A0, that is, A0+1.
28. Outputs are disabled (High-Z) one clock cycle after a NOP.
29. In this example, if address A2 = A1, then data Q20 = D10 and Q21 = D11. Write data is forwarded immediately as read results. This note applies to the whole diagram.
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