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Document #: 38-05383 Rev. *E Page 14 of 31
3.3V TAP AC Test Conditions
Input pulse levels ............................................... V
SS
to 3.3V
Input rise and fall times...................... ..............................1ns
Input timing reference levels...........................................1.5V
Output reference levels...................................................1.5V
Test load termination supply voltage...............................1.5V
3.3V TAP AC Output Load Equivalent
2.5V TAP AC Test Conditions
Input pulse levels.................................................V
SS
to 2.5V
Input rise and fall time .....................................................1 ns
Input timing reference levels................... ......................1.25V
Output reference levels .................. ..............................1.25V
Test load termination supply voltage .................... ........1.25V
2.5V TAP AC Output Load Equivalent
Notes:
10.t
CS
and t
CH
refer to the set-up and hold time requirements of latching data from the boundary scan register.
11. Test conditions are specified using the load in TAP AC test Conditions. t
R
/t
F
= 1 ns.
TAP AC Switching Characteristics Over the operating Range
[10, 11]
Parameter Description Min. Max. Unit
Clock
t
TCYC
TCK Clock Cycle Time 50 ns
t
TF
TCK Clock Frequency 20 MHz
t
TH
TCK Clock HIGH time 20 ns
t
TL
TCK Clock LOW time 20 ns
Output Times
t
TDOV
TCK Clock LOW to TDO Valid 10 ns
t
TDOX
TCK Clock LOW to TDO Invalid 0 ns
Set-up Times
t
TMSS
TMS Set-up to TCK Clock Rise 5 ns
t
TDIS
TDI Set-up to TCK Clock Rise 5 ns
t
CS
Capture Set-up to TCK Rise 5 ns
Hold Times
t
TMSH
TMS Hold after TCK Clock Rise 5 ns
t
TDIH
TDI Hold after Clock Rise 5 ns
t
CH
Capture Hold after Clock Rise 5 ns
T
DO
1.5V
20p
F
Z = 50Ω
O
50Ω
T
DO
1.25V
20p
F
Z = 50Ω
O
50Ω
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