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Award BIOS Setup Utility
DRAM Timing
This field is used to select the timing of the DRAM.
By SPD The EEPROM on a DIMM has SPD (Serial
Presence Detect) data structure that stores
information about the module such as the memory
type, memory size, memory speed, etc. When this
option is selected, the system will run according to
the information in the EEPROM. This option is the
default setting because it provides the most stable
condition for the system. The “SDRAM CAS
Latency” to “DRAM Command Rate” fields will
show the default settings by SPD.
Manual If you want a better performance for your system
other than the one “by SPD”, select “Manual”. Then
select the best option in the “SDRAM CAS
Latency” to “DRAM Command Rate” fields.
SDRAM CAS Latency
The default setting is 3 which is 3 clock cycles for the CAS latency.
Bank Interleave
The options are 2 Bank, 4 Bank and Disabled.
Precharge to Active (Trp)
The options are 2T and 3T.
Active to Precharge (Tras)
The options are 5T and 6T.
Active to CMD (Trcd)
The options are 2T and 3T.
DRAM Command Rate
The options are 1T Command and 2T Command.
DRAM Burst Len
The options are 4 and 8.