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Chapter 4 133
Each PEIM entry point used in 80_PORT
Code Description
0x00
0x01 PEI_EVENT_LOG
0xA1 PEI_OEM_SERVICE
0xA2 PEI_SIO_INIT
0xA3 PEI_MONO_STATUS_CODE
0xA4 PEI_CPU_IO_PCI_CFG
0x06 PEI_CPU_IO
0x07 PEI_PCI_CFG
0xA5 PEI_CPU_PEIM
0xA6 PEI_PLATFORM_STAGE1
0xA7 PEI_VARIABLE
0xA8
0x0C
PEI_SB_INIT
PEI_CAPSULE
0xAA PEI_PLATFORM_STAGE2
0xAC PEI_SB_SMBUS_ARP_DISABLED
0x0F PEI_HOST_TO_SYSTEM
0x40 PEI_MEMORY_INIT
0x41 PEI_S3_RESUME
0xAD PEI_CLOCK_GEN
0xAB PEI_OP_PRESENCE
0xAE PEI_FIND_FV
0x16 PEI_H2O_DEBUG_IO
0x17 PEI_H2O_DEBUG_COMM
0x16~0x1
F
PEI_RESERVED
0x20~0x2
E
PEI_OEM_DEFINED
0xAF PEI_DXE_IPL
Each Driver entry point used in 80_PORT
Code Description
0x30 RESERVED
0xB6 DXE_CRC32_SECTION_EXTRACT
0xB8 SCRIPT_SAVE
0xB9 ACPI_S3_SAVE
0xBA SMART_TIMER
0xBB JPEG_DECODER
0xBC PCX_DECODER
0xBE HT_CPU / MP_CPU
0xBF LEGACY_METRONOME
0xC0 FTWLITE