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Contents
xii C141-E145-02EN
5.5.3 Ultra DMA data in commands 5-116
5.5.3.1 Initiating an Ultra DMA data in burst 5-116
5.5.3.2 The data in transfer 5-117
5.5.3.3 Pausing an Ultra DMA data in burst 5-117
5.5.3.4 Terminating an Ultra DMA data in burst 5-118
5.5.4 Ultra DMA data out commands 5-121
5.5.4.1 Initiating an Ultra DMA data out burst 5-121
5.5.4.2 The data out transfer 5-121
5.5.4.3 Pausing an Ultra DMA data out burst 5-122
5.5.4.4 Terminating an Ultra DMA data out burst 5-123
5.5.5 Ultra DMA CRC rules 5-125
5.5.6 Series termination required for Ultra DMA 5-126
5.6 Timing 5-127
5.6.1 PIO data transfer 5-127
5.6.2 Multiword data transfer 5-128
5.6.3 Ultra DMA data transfer 5-129
5.6.3.1 Initiating an Ultra DMA data in burst 5-129
5.6.3.2 Ultra DMA data burst timing requirements 5-130
5.6.3.3 Sustained Ultra DMA data in burst 5-133
5.6.3.4 Host pausing an Ultra DMA data in burst 5-134
5.6.3.5 Device terminating an Ultra DMA data in burst 5-135
5.6.3.6 Host terminating an Ultra DMA data in burst 5-136
5.6.3.7 Initiating an Ultra DMA data out burst 5-137
5.6.3.8 Sustained Ultra DMA data out burst 5-138
5.6.3.9 Device pausing an Ultra DMA data out burst 5-139
5.6.3.10 Host terminating an Ultra DMA data out burst 5-140
5.6.3.11 Device terminating an Ultra DMA data out burst 5-141
5.6.4 Power-on and reset 5-142
CHAPTER 6 Operations .................................................................................6-1
6.1 Device Response to the Reset 6-2
6.1.1 Response to power-on 6-2
6.1.2 Response to hardware reset 6-3
6.1.3 Response to software reset 6-5