Filter
Top Products
Contents
xiv C141-E218
5.6.3.1 Initiating an Ultra DMA data in burst..................................... 5-151
5.6.3.2 Ultra DMA data burst timing requirements ............................ 5-152
5.6.3.3 Sustained Ultra DMA data in burst......................................... 5-155
5.6.3.4 Host pausing an Ultra DMA data in burst............................... 5-156
5.6.3.5 Device terminating an Ultra DMA data in burst..................... 5-157
5.6.3.6 Host terminating an Ultra DMA data in burst......................... 5-158
5.6.3.7 Initiating an Ultra DMA data out burst................................... 5-159
5.6.3.8 Sustained Ultra DMA data out burst....................................... 5-160
5.6.3.9 Device pausing an Ultra DMA data out burst......................... 5-161
5.6.3.10 Host terminating an Ultra DMA data out burst..................... 5-162
5.6.3.11 Device terminating an Ultra DMA data out burst................. 5-163
5.6.4 Power-on and reset ............................................................................. 5-164
CHAPTER 6 Operations................................................................................. 6-1
6.1 Device Response to the Reset............................................................................ 6-2
6.1.1 Response to power-on............................................................................. 6-2
6.1.2 Response to hardware reset .................................................................... 6-3
6.1.3 Response to software reset ..................................................................... 6-5
6.1.4 Response to diagnostic command........................................................... 6-6
6.2 Power Save ........................................................................................................ 6-7
6.2.1 Power save mode .................................................................................... 6-7
6.2.2 Power commands.................................................................................... 6-9
6.3 Defect Processing .............................................................................................. 6-9
6.3.1 Spare area................................................................................................ 6-9
6.3.2 Alternating processing for defective sectors ........................................ 6-10
6.4 Read-ahead Cache ........................................................................................... 6-12
6.4.1 DATA buffer structure ......................................................................... 6-12
6.4.2 Caching operation................................................................................. 6-13
6.4.3 Using the read segment buffer.............................................................. 6-15