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Specification Update 41
HSD97. Video/Audio Distortion May Occur
Problem: Due to this erratum, internal processor operations can occasionally delay the
completion of memory read requests enough to cause video or audio streaming
underrun.
Implication: Visible artifacts such as flickering on a video device or glitches on audio may occur.
Workaround: It is possible for the BIOS to contain a workaround for this erratum.
Status: For the steppings affected, see the Summary Table of Changes.
HSD98. System May Hang When Audio is Enabled During Package C3
Problem: When audio is enabled while in package C3 state or deeper, audio memory traffic
continues to be generated. Due to this erratum, the processor logic required for
memory traffic may be powered down.
Implication: When this erratum occurs, the processor logic required for audio memory traffic may
not be operational resulting in a system hang.
Workaround: It is possible for the BIOS to contain a workaround for this erratum.
Status: For the steppings affected, see the Summary Table of Changes.
HSD99. INVPCID May Not Cause #UD in VMX Non-Root Operation
Problem: The INVPCID instruction should cause an invalid opcode exception (#UD) in VMX non-
root operation if either bit 31 of the primary processor-based VM-execution controls
(activate secondary controls) or bit 12 of the secondary processor-based VM-execution
controls (enable INVPCID) is 0.
Due to this erratum, the INVPCID instruction will not
cause #UD if “activate secondary controls” is 0 and “enable INVPCID” is 1.
Instead, the
instruction will either execute normally or cause a VM exit if the “INVLPG exiting” VM-
execution control is 1.
Implication: The processor may cause a VM exit that software does not expect. Intel has not observed
this erratum with any commercially available software.
Workaround: None identified.
Status: For the steppings affected, see the Summary Table of Changes.
HSD100. Non-Compliant PFAT Module Base Address May Cause Unpredictable
System Behavior
Problem: PFAT (Platform Firmware Armoring Technology) requires the PFAT module base address
be 256KB aligned and reside in the first 4GB of memory. If BIOS does not comply with
these requirements when setting up the PFAT module, the processor should GP# at
PFAT launch. Due to this erratum, a #GP fault may not be generated.
Implication: A PFAT module that does not follow the PFAT module base address requirements may
result in unpredictable system behavior.
Workaround: It is possible for the BIOS to contain a workaround for this issue.
Status: For the steppings affected, see the Summary Table of Changes.