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a backup in case of system cooling failure. The system thermal design should allow
the power delivery circuitry to operate within its temperature specification even while
the processor is operating at its Thermal Design Power.
THERMTRIP# Signal
Regardless of whether or not Adaptive Thermal Monitor is enabled, in the event of a
catastrophic cooling failure, the processor will automatically shut down when the
silicon has reached an elevated temperature (refer to the THERMTRIP# definition in
Error and Thermal Protection Signals on page 88). THERMTRIP# activation is
independent of processor activity. The temperature at which THERMTRIP# asserts is
not user configurable and is not software visible.
Digital Thermal Sensor
Each processor execution core has an on-die Digital Thermal Sensor (DTS) that
detects the core's instantaneous temperature. The DTS is the preferred method of
monitoring processor die temperature because:
• It is located near the hottest portions of the die.
• It can accurately track the die temperature and ensure that the Adaptive Thermal
Monitor is not excessively activated.
Temperature values from the DTS can be retrieved through:
• A software interface using processor Model Specific Register (MSR).
• A processor hardware interface as described in Platform Environmental Control
Interface (PECI) on page 37.
When temperature is retrieved by the processor MSR, it is the instantaneous
temperature of the given core. When temperature is retrieved using PECI, it is the
average of the highest DTS temperature in the package over a 256 ms time window.
Intel recommends using the PECI reported temperature for platform thermal control
that benefits from averaging, such as fan speed control. The average DTS
temperature may not be a good indicator of package Adaptive Thermal Monitor
activation or rapid increases in temperature that triggers the Out of Specification
status bit within the PACKAGE_THERM_STATUS MSR 1B1h and IA32_THERM_STATUS
MSR 19Ch.
Code execution is halted in C1 or deeper C-states. Package temperature can still be
monitored through PECI in lower C-states.
Unlike traditional thermal devices, the DTS outputs a temperature relative to the
maximum supported operating temperature of the processor (Tj
MAX
), regardless of
TCC activation offset. It is the responsibility of software to convert the relative
temperature to an absolute temperature. The absolute reference temperature is
readable in the TEMPERATURE_TARGET MSR 1A2h. The temperature returned by the
DTS is an implied negative integer indicating the relative offset from Tj
MAX
. The DTS
does not report temperatures greater than Tj
MAX
. The DTS-relative temperature
readout directly impacts the Adaptive Thermal Monitor trigger point. When a package
DTS indicates that it has reached the TCC activation (a reading of 0h, except when the
TCC activation offset is changed), the TCC will activate and indicate an Adaptive
Thermal Monitor event. A TCC activation will lower both IA core and graphics core
frequency, voltage, or both. Changes to the temperature can be detected using two
programmable thresholds located in the processor thermal MSRs. These thresholds
5.7
5.8
Processor—Thermal Management
Desktop 4th Generation Intel
®
Core
™
Processor Family, Desktop Intel
®
Pentium
®
Processor Family, and Desktop Intel
®
Celeron
®
Processor Family
Datasheet – Volume 1 of 2 December 2013
78 Order No.: 328897-004