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28 Specification Update
HSD40. Spurious VT-d Interrupts May Occur When the PFO Bit is Set
Problem: When the PFO (Primary Fault Overflow) field (bit [0] in the VT-d FSTS [Fault Status]
register) is set to 1, further faults should not generate an interrupt. Due to this
erratum, further interrupts may still occur.
Implication: Unexpected Invalidation Queue Error interrupts may occur. Intel has not observed this
erratum with any commercially available software.
Workaround: Software should be written to handle spurious VT-d fault interrupts.
Status: For the steppings affected, see the Summary Table of Changes.
HSD41. N/A. Erratum has been removed
HSD42. AVX Gather Instruction That Causes a Fault or VM Exit May Incorrectly
Modify Its Destination Register
Problem: An execution of a 128-bit AVX gather instruction zeroes the upper 128 bits of the
instruction's destination register unless access to the first unmasked element causes a
fault or VM exit. Due to this erratum, these bits may be cleared even when accessing
the first unmasked element causes a fault or VM exit. Instructions impacted by this
erratum are: VGATHERDPS, VGATHERDPD, VGATHERQPS, VGATHERQPD,
VPGATHERDD, VPGATHERDQ, VPGATHERQD, and VPGATHERQQ.
Implication: Software that depends on the destination register of a 128-bit AVX gather instruction to
remain unchanged after access of the first unmasked element results in fault or VM exit
may not behave as expected.
Workaround: It is possible for the BIOS to contain a workaround for this erratum.
Status: For the steppings affected, see the Summary Table of Changes.
HSD43. Inconsistent NaN Propagation May Occur When Executing (V)DPPS
Instruction
Problem: Upon completion of the (V)DPPS instruction with multiple different NaN encodings in
the input elements, software may observe different NaN encodings in the destination
elements.
Implication: Inconsistent NaN encodings in the destination elements for the (V) DPPS instruction
may be observed.
Workaround: It is possible for the BIOS to contain a workaround for this erratum.
Status: For the steppings affected, see the Summary Table of Changes.