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DESIGN FEATURES:
Very simple, compact, and inexpensive design. Two 100-pin PQFPs, 3 crystals, a 10Base-T
SMT isolation transformer, a battery (or adapter), and 3 connectors are all that is required for a
fully functional system.
PPIC directly drives piezo buzzer for low battery detection and EPP inactivity. A 22k resistor
on pin 35 forms a simple voltage divider with the internal 100K internal pullup to signal a low
battery when VCC drops to about 4V.
EPP inactivity detection with WATCHDOG timer enabled (JP1). This allows the user to be
signaled if the adapter is unplugged and put away with the power on.
PPIC nS0 is used for power management on the 91C92. The Ethernet controller will remain in
Standby Mode until the driver software is run to enable the adapter.
PPIC nS1 is used as an indicator that the PPIC has been initialized properly by the driver
software.
PPIC nS2 is used to control the SCECR EEPROM interface enable.
PPIC nS3 is used to emulate the Hi-Byte Enable of the 16-bit ISA interface.
The serial EEPROM is enabled by grounding ENEEP, and IOS0-2 are preset to '000' for
software programming by the host of partition 0.
A Pulse Engineering PE-65486A 10Base-T interface transformer is used with integrated
predistortion resistors for increased integration. An alternate transformer could be used for
lower cost.
Alternate AUI interface easily implemented with pins 78-85. 10Base-2/Thin-Ethernet can be
added with minimal external circuitry and a coax transceiver chip such as the LAN83B692 .
Link Integrity, TX and RX Activity LED's are directly driven by the LAN91C92.
Revision Date 1/13/94