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X6DH8-G2/X6DHE-G2 User's Manual
Universal Serial Bus
(USB0/1)
Two USB 2.0 ports are located
beside the PS/2 keyboard/mouse
ports. USB0 is the bottom connec-
tor and USB1 is the top connector.
See the table on the right for pin
definitions.
Universal Serial Bus Pin Definitions
Pin
Number Definition
1Vcc
2 Data-
3 Data+
4 Ground
USB0/1
Chassis Intrusion
A Chassis Intrusion header is lo-
cated at JL1. Attach the appropri-
ate cable to inform you of a chas-
sis intrusion.
USB0/1
GLAN1
®
JLAN1
S
UPER X6DH8-G2
GLAN2
DIMM 2B (Bank 2)
DIMM 2A (Bank 2)
DIMM 3B (Bank 3)
DIMM 3A (Bank 3)
DIMM 4B (Bank 4)
DIMM 4A (Bank 4)
DIMM 1A (Bank 1)
DIMM 1B (Bank 1)
Fan1
8-pin
PWR
PWR
SMBus
JF1
FP Control
JD1
S
P
K
PW LED
JP15
Fan2JOH1
O
H
F
a
n
8
Fan3
C
H
In
tru
J
L
1
W
D
E
n
a
b
le
IP
M
I
IDE1
Floppy
C
O
M
2
J
2
0
B
IO
S
J
W
D
J
P
A
1
SCSI CH A
Ultra 320
SCSI CH B
Fan4
J
P
A
2
7
9
0
2
C
T
R
L
S
A
T
A
0
S
A
T
A
1
U
S
B
2
/3
S
M
B
U
S
S
p
e
a
k
e
r
PCI-X #1 100 MHz ZCR
PCI-X #2 100 MHz
PCI-X #3 133 MHz
W
O
R
B
a
tte
ry
J
P
L
1
G
L
A
N
C
T
L
R
R
A
G
E
-
X
U
S
B
4
8
2
5
4
6
G
L
A
N
E
n
a
b
le
X4 PCI-Epx #4
X8 PCI-Epx #5
X8 PCI-Epx #6
J12
J13
J14
J15
J16
J17
S
u
p
e
r
I/O
N
o
rth
B
rid
g
e
J
P
G
1
V
G
A
C
O
M
1
U
S
B
0
/1
K
B
/
M
o
u
s
e
F
a
n
6
F
a
n
5
A
T
X
P
W
R
4
-P
in
P
W
R
JPF
Parrallel
Port
J
1
1
J
3
2
2
4
-P
in
Force PWR ON
V
G
A
E
n
a
b
le
F
a
n
7
J24
J1D1
J1B4
Reboot
Opt. Enable
JP14
J3
J4
JP8
J
7
SCSI
J
P
A
3
J
D
2
J
2
2
C
P
U
1
C
P
U
2
Alrm
Reset
J
W
O
R
SCSI
Enable
SCSI CHA Term. Ena
C
lr
C
M
O
S
J
B
T
1
IC
H
5
R
S
I/O
P
X
H
J
9
J
5
J
6
J
2
3
W
O
L
J
W
O
L
J
S
1
J
S
2
U
ltra
3
2
0
J
A
2
J
A
1
IDE2
JP12
PW
Fault
JP13
3rd PS
Alarm
SCSI CHB Term. Ena
Chassis
Intrusion