Texas Instruments Codec Engine Server Server User Manual


 
Where Does the Codec Engine Fit into My Architecture?
Codec Engine Overview 1-5
The following figure is a modification of the previous diagram that shows
how this architecture is distributed in a GPP+DSP system. In this
example, yellow portions run on the GPP, and grey portions run on the
DSP. This is, the video encoder skeleton and the video encoder codecs
are on the DSP and the application and video encoder stubs are on the
GPP.
Since Codec Engine is flexible, alternate diagrams could be shown for
GPP-only and DSP-only systems.
G
P
P
+
D
S
P
Codec Engine Runtime
Application
Video Encode
stubs
Video Encode
stubs
Core Engine SPIsCore Engine SPIs
VISA SPIsVISA SPIs
DSP Server
app processor
DSP Server
app processor
Core Engine
Runtime
VISA APIsCore Engine APIs VISA APIsCore Engine APIs
MP4 Encode
VC1 Encode
MP4 Encode
VC1 Encode
Video Encode
skeleton
Video Encode
skeleton
media middleware
lo
c
a
l o
n
l
y