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&,5&8,7',$*5$0
>@&,5&8,7',$*5$0
A
A
B
B
C
C
D
D
E
E
4
4
3
3
2
2
1
1
MCU PWB (CPU SECTION)
1. MCU PWB
C126
47p
12
BR116
33J
1
2
3
4
8
7
6
5
R107 *4
21
BR119
33J
1
2
3
4
8
7
6
5
BR122
33J
1
2
3
4
8
7
6
5
BR125
33J
1
2
3
4
8
7
6
5
R103 *1
21
X101
HC-49U/S
19.6608MHz
12
R108
10kJ
21
BR124
33J
1
2
3
4
8
7
6
5
R114
11kF
21
BR118
33J
1
2
3
4
8
7
6
5
R104 *3
21
R102
*2
21
BR123
33J
1
2
3
4
8
7
6
5
BR120
33J
1
2
3
4
8
7
6
5
R106
0J
21
C104
100p
12
C106
12p
12
C114 0.1u
12
C115 0.1u
12
C111 0.1u
12
C122 OPEN
12
C119 OPEN
1
2
C105
100p
12
C109
10u/16V
12
+
C112 0.1u
12
C120 OPEN
12
C124
0.1u
12
C110 0.1u
12
C117 OPEN
12
C113 0.1u
12
C103 *5
12
R109
OPEN
21
C125
22000p
12
C123 OPEN
12
C102
*6
12
R117
10kF
21
C108
0.1u
12
C121 OPEN
12
R105
0J
21
C118 OPEN
12
R112 10kJ
21
BR114
10kJ
1
2
3
4
8
7
6
5
L101
ZJSR5101-223
1
2
3
BR108
10kJ
1
2
3
4
8
7
6
5
BR115
10kJ
1
2
3
4
8
7
6
5
BR107
10kJ
1
2
3
4
8
7
6
5
BR110
10kJ
1
2
3
4
8
7
6
5
C128
0.1u
12
R111 10kJ
21
BR117
10kJ
1
2
3
4
8
7
6
5
BR109
10kJ
1
2
3
4
8
7
6
5
BR105
10kJ
1
2
3
4
8
7
6
5
BR101 10kJ
1
2
3
4
8
7
6
5
R101
OPEN
21
IC102
24WC02 or HT24LC02
E0
1
E1
2
E2
3
VSS
4
SDA
5
SCL
6
WC
7
VCC
8
BR102 10kJ
1
2
3
4
8
7
6
5
BR103 10kJ
1
2
3
4
8
7
6
5
BR106
10kJ
1
2
3
4
8
7
6
5
BR104
10kJ
1
2
3
4
8
7
6
5
IC101
P2010/PLL701-01
Xin
1
Xout
2
FS0
3
Vss
4
SSon
5
MODOUT
6
SR0
7
VDD
8
BR112 10kJ
1
2
3
4
8
7
6
5
R271
10kJ
21
IC103
H8S/2320
HD6412320VF25(H8S/2320)
P35/SCK1
64
P34/SCK0
63
P33/RxD1
62
P32/RxD0
61
P31/TxD1
60
P30/TxD0
59
VCC
58
PD7/D15
57
PD6/D14
56
PD5/D13
55
PD4/D12
54
Vss
53
PD3/D11
52
PD2/D10
51
PD1/D9
50
PD0/D8
49
PE7/D7
48
PE6/D6
47
PE5/D5
46
PE4/D4
45
Vss
44
PE3/D3
43
PE2/D2
42
PE1/D1
41
PE0/D0
40
VCC
39
AVc c
103
Vref
104
P40/AN0
105
P41/AN1
106
P42/AN2
107
P43/AN3
108
P44/AN4
109
P45/AN5
110
P46/AN6/DA0
111
P47/AN7/DA1
112
AVs s
113
Vss
114
P17/PO15/TIOCB2/TCLKD
115
P16/PO14/TIOCA2
116
P15/PO13/TIOCB1/TCLKC
117
P14/PO12/TIOCA1
118
P13/PO11/TIOCD0/TCLKB
119
P12/PO10/TIOCC0/TCLKA
120
P11/PO9/TIOCB0/DACK1
121
P10/PO8/TIOCA0/DACK0
122
MD0
123
MD1
124
MD2
125
PG0/CAS
126
PG1/CS3
127
PG2/CS2
128
PG3/CS1
1
PG4/CS0
2
Vss
3
NC
4
VCC
5
PC0/A0
6
PC1/A1
7
PC2/A2
8
PC3/A3
9
Vss
10
PC4/A4
11
PC5/A5
12
PC6/A6
13
PC7/A7
14
PB0/A8
15
PB1/A9
16
PB2/A10
17
PB3/A11
18
Vss
19
PB4/A12
20
PB5/A13
21
PB6/A14
22
PB7/A15
23
PA0/A16
24
PA1/A17
25
PA2/A18
26
PA3/A19
27
Vss
28
PA4/A20/IRQ4
29
PA5/A21/IRQ5
30
PA6/A22/IRQ6
31
PA7/A23/IRQ7
32
P67/ /CS7 IRQ3
33
P66/ /CS6 IRQ2
34
Vss
35
Vss
36
P65/IRQ1
37
P64/IRQ0
38
P53/ADTRG
102
P52/SCK2
101
Vss
100
Vss
99
P51/RxD2
98
P50/TxD2
97
PF0/BREQ
96
PF1/BACK
95
PF2/ / WAIT/BREQOLCAS
94
PF3/LWR
93
PF4/HWR
92
PF5/RD
91
PF6/AS
90
VCC
89
PF7/0
88
Vss
87
EXTAL
86
XTAL
85
VCC
84
STBY
83
NMI
82
RES
81
WDTOVF
80
P20/PO0/TIOCA3
79
P21/PO1/YICOB3
78
P22/PO2/TIOCC3
77
P23/PO3/TIOCD3
76
P24/PO4/TIOCA4
75
P25/PO5/TIOCB4
74
P26/PO6/TIOCA5
73
P27/PO7/TIOCB5
72
P63/TEND1
71
P62/DREQ1
70
P61/ /TEND0 CS5
69
Vss
68
Vss
67
P60/ /DREQ0CS4
66
Vss
65
BR121
33J
1
2
3
4
8
7
6
5
IC104
M51957BFP
NC
8
GND
4
VCC
7
NC
1
IN
2
NC
3
Cd
5
OUT
6
C107
0.1u
1
2
C101
0.1u
12
R270
OPEN
21
R115
10kJ
21
R118
10kJ
21
R116 OPEN
21
R276 33J
21
BR111
10kJ
1
2
3
4
8
7
6
5
R277 33J
21
R278 100J
21
R283
10kJ
21
R284
10kJ
21
R285 33J
21
R291 1kJ
21
D5
CPUCLK(NC)
D0
SPMT1
RY/BY
CCD_TG
D7
LWR
D12
/CS0
/CS2
RESETOUT
D4
LWR
D8
D15
/CS2
/SCANSP
/TRANSST
D10
/CS0
D3
MT_HOME
(FW)
D7
SCL
/CS1
FAXSTS(NC)
/SCANST
/PRINTST
D6
CPU_SYNC
/PRINTST
D13
MT_HOME
D5
D0
CCD_TG
ARB_INT
SDA
D12
CPUNRST
D9
SPMT0
D11
SPMT2
/SCANSP
D10
(FW)
SPMT3
CPUCLK(NC)
FAXSTS(NC)
D4
D2
/TRANSST
CPU_SYNC
D1
D9
SCL
D2
ARB_INT
D14
SPMT1
SPMT3
/CS1
SDA
D3
FAXCMD(NC)
A20
D6
D14
/SCANST
D8
D1
D15
SPMT0
SPMT2
FAXCMD(NC)
D13
D11
RY/BY
A0
A5
A2
A4
A11
A19
A13
A3
A8
A10
A7
A12
A16
A14
A18
A1
A15
A17
A6
A9
A20
CPUNRST
RESETOUT
HWR
HWR
RD
RD
RESETOUT1
RESETOUT1
VCC3
VCC3
CPU3.3
CPU3.3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
VCC3
/ASIC_RST
A[19..0]
mt_at_home
(SIN1)
RY/BY
RTH
SDA
TMCLK
(PSW)
/CS0
/CS2
POFF
DMT3
SPMT1
DMT0
DMT2
/SCANST
SELIN1
SELIN3
CCD_TG
/PRINTST
CPU_SYNC
ARB_INT
SCL
(SIN3)
(KIN1)
D[15..0]
(SIN2)
PSL
(USBIN)
TMEN
(KIN2)
SPMT0
/CS1
PMCLK
SPMT2/MIRCNT
DMT1
/SCANSP
/TRANSST
(SPPD)
SPMT3
SELIN2
(FW)
/LWR
TxD1
/RD
/HWR
ONL
D_CONT
BEO
CPUNRST
/CL_RESET
Spreading Range :
+/- 1.25%
R104(*3) OPEN 0J
R103(*1) OPEN 680J
R107(*4) 22J OPEN
R102(*2) 0J OPEN
C103(*5)
C102(*6)
22pF
22pF
15pF
15pF
*R102,R103,C102, and C103 are temtative
(3-A2)(2-A2)
(2-A2)
(3-A2)
(4-C3)
(4-C3)
(4-C3)
(9-B1)
(9-B1)
(5-E3)
(4-D3)
(4-D3)
(4-D3)
(2-A2)
(2-A2)
(2-A2)
(2-A2)
(4-C2)
(4-C2)
(4-C2)
(4-C2)
(8-C3)
(8-D3)
(2-A1)
(3-A2)
(3-C2)
(2-D1)
(2-A1) (3-A3)
(2-A1)
(4-D4)
(8-C2)
(7-E1)
(2-A1)
(2-B4)
(7-E1)
(2-A2) (3-A1)
(6-D3)
(6-D3)
(6-D4)
(6-D4)
(5-B2)
(5-B1)
(2-A2)
(2-A2)
(4-D4)
(4-D4)
(3-B2)
(9-B1) (2-D1)
(9-B3)
(8-A2)
(8-C4)
CPU port selection of a /ASIC_RST output
PF6
33J mounted on R116 and R285 are OPEN
P34
33J mounted on R285 and R116 are OPEN
(8-C1)
(3-B2)
When IC101 is, mounted NOT mounted
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