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2 Troubleshooting Procedures 2.4 System Board Troubleshooting
PORTEGE M300 Maintenance Manual (960-504) 2-23
Table 2-4 Debug port error status (2/7)
D port status Inspection items Details
(F007h)
Releasing of BIOS write-protection
Enables the I/O space of SMBus
Permission of SMBus accesses
Configuration of DRAM
Permission of cache (only for L1 cache)
MEMEORY CLEAR
F008h
Transition to RAM BIOS from ROM BIOS
F009h
Saving of key scan code
Setting of TASK_1ms_TSC
Display message in navigation panel (EC/KBC UPDATE,
BIOS UPDATE/DAMEGED)
Key input
Reading of
CHGBIOSA.EXE/CHGFIRMA.EXE
FDC RESET
Setting of parameters for 2HD (1.44MB),
Setting of transmission rate
Reading of first sector, If it is the data of
1.44MB (2HD), the media type is definite
Setting of parameters for 2DD (720KB),
Setting of transmission rate
Retrieval of “CHGBIOSA.EXE” from the
root directory.
Calculates the directory start header and
sector.
Reading one sector of the root directory.
Retrieval the entry of “CHGBIOSA.EXE”
and “CHGFIRMA.EXE” from the sector
read.
Reading of EXE header of
“CHGBIOSA.EXE” and “CHGFIRMA.EXE”
Key input when error
Execution of “CHGBIOSA.EXE” and
“CHGFIRMA.EXE”
F100h
Initialization of PIT channel 1 Setting “30μs” to the refresh interval
F101h
DRAM type & check size Only when cold booting
Checking DRAM size
If DRAM size is "0", the program halt
Stack field test of SM-RAM Program halt when it’s not used as stack