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8205
FUNCTIONAL
DESCRIPTION
Decoder
The 8205 contains a one
out
of eight binary decoder. It ac·
cepts a three bit binary code and by gating this input, creates
an
exclusive output
that
represents the value
of
the
input
code.
For example,
if
a binary code of
101
was present on the
AO,
A 1 and
A2
address input lines, and the device was enabled,
an
active
low
signal
would appear on
the
05
outputJine.
Note
that
all
of the other
output
pins are sitting at a logic
high, thus the decoded
output
is
said
to
be exclusive. The
decoders outputs
will
follow
the
truth table shown below
in
the
same manner for
all
other input variations.
Enable
Gate
When using a decoder it
is
often necessary
to
gate
the
out·
puts with timing or enabling signals so
that
the exclusive
output
of the decoded value
is
synchronous with the overall
system.
The
8205 has a built-in function for such gating. The three
enable inputs
(~,
~,
E3)
are ANDed together and create.
a single enable signal for the decoder. The combination of
both active
"high" and active "low" device enable inputs
provides
the
designer with a powerfully flexible gating func-
tion
to
help reduce package count
in
his system.
8-19
Ao
A,
A.z
ENABLE GATE
Ei:==~:)
..
E3
Figure 1. Enable Gate
ADDRESS
ENABLE
Ao
A,
A2
E,
E2 E3
L L L L
L
H
H
L
L L L
H
L H L L
L
H
H
H
L L L H
L
L
H
L L H
H
L H L
L
H
L H H
L L H
H
H H L
L
H
X
X X
L L L
X
X X
H
L L
X X X L H
L
X X X H H
L
X
X X
H L H
X X X L H H
X X X H H H
0.
0;
0,
0,
DECODER
0.
0;;
0;;
0,
fEH2·E3)
OUTPUTS
0 1 2 3 4
5 6
7
L H H H H H H
H
H
L
H H H H
H H
H
H L
H
H
H
H H
H H
H
L H H H H
H H H H
L
H H H
H
H H H H L H H
H
H H H H H
L H
H
H
H H
H
H
H
L
H H H H H H H
H
H H
H H
H H H H
H
H
H H
H H H H
H H H H H H
H H
H
H H H H H H
H
H
H H H H H
H H
H H H H H H
H H
AFN-D0204B-02