Asus 810 Computer Hardware User Manual


 
ASUS MEW-L Users Manual 61
4. BIOS SETUP
4. BIOS SETUP
SDRAM Cycle Time (Tras, Trc) [5T, 7T]
This feature controls the number of SDRAM clocks used per access cycle.
Configuration options: [5T, 7T] [6T, 8T]
SDRAM Address Setup Time [1T Delay]
Configuration options: [No Delay] [1T Delay]
SDRAM Page Closing Policy [All Banks]
This feature controls whether the graphic and memory controller hub will
precharge one or all banks after a page miss. Configuration options: [One
Bank] [All Banks]
CPU Latency Timer [Enabled]
Configuration options: [Disabled] [Enabled]
Onboard VGA [Enabled]
Leave on default setting if you want to use the onboard VGA. If this field is
disabled, all Display Cache configurations will not be available. Configura-
tion options: [Disabled] [Enabled]
Graphics Window Size [64MB]
This feature allows you to select the size of mapped memory for AGP graphic
data. Configuration options: [64MB] [32MB]
Memory Hole At 15M-16M [Disabled]
This field allows you to reserve an address space for ISA expansion cards
that require it. Configuration options: [Disabled] [Enabled]
PCI 2.1 Support [Enabled]
This function allows you to enable or disable PCI 2.1 features including passive
release and delayed transaction. Configuration options: [Disabled] [Enabled]
High Priority PCI Mode [Enabled]
This field allows you to give PCI slot 1 a higher priority. You may want to
leave on the default setting if you are using an IEEE-1394 PCI card. Con-
figuration options: [Disabled] [Enabled]
Onboard PCI IDE Enable [Both]
You can select to enable the primary IDE channel, secondary IDE channel,
both, or disable both channels. Configuration options: [Both] [Primary] [Sec-
ondary] [Disabled]
Onboard ISA Bridge [Enabled]
If you are not using any ISA cards, you may disable this field. When this
field is disabled, the 8-bit and 16-bit I/O Recovery Time configurations
will not be available. Configuration options: [Disabled] [Enabled]
8-bit, 16-bit I/O Recovery Time [3.5 BUSCLK]
Leave on default setting.
Chip Configuration