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ASUS A7M266-D User’s Manual58
4. BIOS SETUP
4. BIOS SETUP
Chip Configuration
AGP Fast Write [Disabled]
Configuration options: [Enabled] [Disabled]
AGP Compensation [Bypass]
Configuration options: [Bypass] [Auto]
AGP Signal Driving [Auto]
Configuration options: [Auto] [Manual]
Graphics Aperture Size [32MB]
This feature allows you to select the size of mapped memory for AGP graphic
data. Configuration options: [32MB] [64MB] [128MB] [256MB] [512MB]
Video Memory Cache Mode [UC]
USWC (uncacheable, speculative write combining) is a new cache technol-
ogy for the video memory of the processor. It can greatly improve the dis-
play speed by caching the display data. You must set this to UC (uncacheable)
if your display card cannot support this feature; otherwise your system may
not boot. Configuration options: [UC] [USWC]
Software DDR PDL Delay [Auto]
Configuration options: [Auto] [Manual]
Delayed Transaction [Disabled]
Leave on default setting. [Enabled] frees the PCI Bus when the CPU is
accessing 8-bit ISA devices that normally consume about 50-60 PCI Clocks
without PCI delayed transaction. Select [Disabled] for ISA devices that are
not PCI 2.1 compliant. Configuration options: [Disabled] [Enabled]
PCI to DRAM Prefetch [Disabled]
Configuration options: [Disabled] [Enabled]
AGP to DRAM Prefetch [Enabled]
Configuration options: [Disabled] [Enabled]
S2K Slew Rate Control [3]
Configuration options: [0, 1, 2, 3, 4, 5, 6, 7]
Onboard PCI IDE Enable [Both]
You can select to enable the primary IDE channel, secondary IDE channel,
both, or disable both channels. Configuration options: [Both] [Primary]
[Secondary] [Disabled]