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PRELIMINARY
CY14B102L, CY14B102N
Document #: 001-45754 Rev. *B Page 12 of 24
AutoStore/Power Up RECALL
Parameters Description
20 ns 25 ns 45 ns
Unit
Min Max Min Max Min Max
t
HRECALL
[21]
Power Up RECALL Duration 20 20 20 ms
t
STORE
[22]
STORE Cycle Duration 8 8 8 ms
t
DELAY
[23]
Time Allowed to Complete SRAM Cycle 20 25 25 ns
V
SWITCH
Low Voltage Trigger Level 2.65 2.65 2.65 V
t
VCCRISE
VCC Rise Time 150 150 150 μs
V
HDIS
[14]
HSB Output Driver Disable Voltage 1.9 1.9 1.9 V
t
LZHSB
HSB To Output Active Time 5 5 5 μs
t
HHHD
HSB High Active Time 500 500 500 ns
Switching Waveforms
Figure 11. AutoStore or Power Up RECALL
[24]
9
6:,7&+
9
+',6
9
9&&5,6(
W
6725(
W
6725(
W
+++'
W
+++'
W
'(/$<
W
'(/$<
W
/=+6%
W
/=+6%
W
+5(&$//
W
+5(&$//
+6%287
$XWRVWRUH
32:(5
83
5(&$//
5HDG:ULWH
,QKLELWHG
5:,
32:(583
5(&$//
5HDG:ULWH
%52:1
287
$XWRVWRUH
32:(583
5(&$//
5HDG:ULWH
32:(5
'2:1
$XWRVWRUH
1RWH
1RWH
1RWH
Notes
21.t
HRECALL
starts from the time V
CC
rises above V
SWITCH.
22.If an SRAM write has not taken place since the last nonvolatile cycle, no AutoStore or Hardware Store takes place.
23.On a Hardware STORE, Software Store / Recall, AutoStore Enable / Disable and AutoStore initiation, SRAM operation continues to be enabled for time t
DELAY
.
24.Read and Write cycles are ignored during STORE, RECALL, and while VCC is below V
SWITCH.
25.HSB pin is driven HIGH to VCC only by internal 100kOhm resistor, HSB driver is disabled.
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