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CY62148EV30
Document #: 38-05576 Rev. *G Page 3 of 12
Maximum Ratings
Exceeding maximum ratings may impair the useful life of the
device. These user guidelines are not tested.
Storage Temperature.................................. –65°C to +150°C
Ambient Temperature with
Power Applied .............................................. 55°C to +125°C
Supply Voltage to Ground
Potential..........................................–0.3V to V
CC(max)
+ 0.3V
DC Voltage Applied to Outputs
in High-Z State
[5, 6]
........................–0.3V to V
CC(max)
+ 0.3V
DC Input Voltage
[5, 6]
.....................–0.3V to V
CC(max)
+ 0.3V
Output Current into Outputs (LOW)............................. 20 mA
Static Discharge Voltage.......................................... > 2001V
(MIL-STD-883, Method 3015)
Latch up Current.....................................................> 200 mA
Operating Range
Product Range
Ambient
Temperature
V
CC
[7]
CY62148EV30 Ind’l/Auto-A –40°C to +85°C 2.2V to 3.6V
Electrical Characteristics (Over the Operating Range)
Parameter Description Test Conditions
- 45 (Ind’l/Auto-A) - 55
[1]
Unit
Min Typ
[4]
Max Min Typ
[4]
Max
V
OH
Output HIGH
Voltage
I
OH
= –0.1 mA 2.0 2.0 V
I
OH
= –1.0 mA, V
CC
> 2.70V 2.4 2.4 V
V
OL
Output LOW
Voltage
I
OL
= 0.1 mA 0.4 0.2 V
I
OL
= 2.1 mA, V
CC
> 2.70V 0.4 0.4 V
V
IH
Input HIGH
Voltage
V
CC
= 2.2V to 2.7V 1.8 V
CC
+ 0.3V 1.8 V
CC
+ 0.3V V
V
CC
= 2.7V to 3.6V 2.2 V
CC
+ 0.3V 2.2 V
CC
+ 0.3V V
V
IL
Input LOW
Voltage
V
CC
= 2.2V to 2.7V For VFBGA and
TSOP II package
–0.3 0.6 V
For SOIC package –0.3 0.4
[8]
V
V
CC
= 2.7V to 3.6V For VFBGA and
TSOP II package
–0.3 0.8 V
For SOIC package –0.3 0.6
[8]
I
IX
Input Leakage
Current
GND < V
I
< V
CC
–1 +1 –1 +1 μA
I
OZ
Output Leakage
Current
GND < V
O
< V
CC
, Output Disabled –1 +1 –1 +1 μA
I
CC
V
CC
Operating
Supply Current
f = f
max
= 1/t
RC
V
CC
= V
CC(max),
I
OUT
= 0 mA,
CMOS levels
15 20 15 20 mA
f = 1 MHz 2 2.5 2 2.5
I
SB1
Automatic CE
Power Down
Current — CMOS
Inputs
CE > V
CC
– 0.2V,
V
IN
> V
CC
– 0.2V, V
IN
< 0.2V
f = f
max
(Address and Data Only),
f = 0 (OE
and WE), V
CC
= 3.60V
17 17μA
I
SB2
[9]
Automatic CE
Power Down
Current — CMOS
Inputs
CE > V
CC
– 0.2V,
V
IN
> V
CC
– 0.2V or V
IN
< 0.2V,
f = 0, V
CC
= 3.60V
17 17μA
Notes
5. V
IL(min)
= –2.0V for pulse durations less than 20 ns.
6. V
IH(max)
= V
CC
+ 0.75V for pulse durations less than 20 ns.
7. Full device AC operation assumes a minimum of 100 μs ramp time from 0 to V
CC(min)
and 200 μs wait time after V
CC
stabilization.
8. Under DC conditions the device meets a V
IL
of 0.8V (for V
CC
range of 2.7V to 3.6V) and 0.6V (for V
CC
range of 2.2V to 2.7V). However, in dynamic conditions
Input LOW voltage applied to the device must not be higher than 0.6V and 0.4V for the above ranges. This is applicable to SOIC package only. Please refer to
AN13470 for details.
9. Only chip enable (CE
) must be HIGH at CMOS level to meet the I
SB2
/ I
CCDR
spec. Other inputs can be left floating.
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