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CY62167DV18 MoBL
®
Document #: 38-05326 Rev. *C Page 7 of 11
Write Cycle 1 (WE Controlled)
[13, 17, 18]
Write Cycle 2 (CE
1
or CE
2
Controlled)
[13, 17, 18]
Switching Waveforms (continued)
t
HD
t
SD
t
PWE
t
SA
t
HA
t
AW
t
SCE
t
WC
t
HZOE
VALID DATA
t
BW
NOTE 19
CE
1
ADDRESS
CE
2
WE
DATA IO
OE
BHE/BLE
t
HD
t
SD
t
PWE
t
HA
t
AW
t
SCE
t
WC
t
HZOE
VALID DATA
t
BW
t
SA
NOTE 19
CE
1
ADDRESS
CE
2
WE
DATA IO
OE
BHE/BLE
Notes
17.Data IO is high impedance if OE
= V
IH
.
18.If CE
1
goes HIGH and CE
2
goes LOW simultaneously with WE = V
IH
, the output remains in a high impedance state.
19.During this period, the IOs are in output state. Do not apply input signals.
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