Cypress CY7C138 Computer Hardware User Manual


 
CY7C138, CY7C139
Document #: 38-06037 Rev. *D Page 5 of 17
Figure 2. AC Test Loads and Waveforms
3.0V
GND
90%
90%
10%
<
3ns
< 3 ns
10%
ALL INPUT PULSES
(a) Normal Load (Load 1)
R1 = 893Ω
5V
OUTPUT
R2 = 347Ω
C= 30
pF
R
TH
= 250Ω
V
TH
= 1.4V
OUTPUT
C = 30pF
(b) Thé venin Equivalent(Load 1)
(c) Three-State Delay (Load 3)
C= 30pF
OUTPUT
Load (Load 2)
R1 = 893Ω
R2 = 347Ω
5V
OUTPUT
C= 5pF
Note
8. Tested initially and after any design or process changes that may affect these parameters.
Switching Characteristics Over the Operating Range
[9]
Parameter Description
7C138-15
7C139-15
7C138-25
7C139-25
7C138-35
7C139-35
7C138-55
7C139-55
Unit
Min Max Min Max Min Max Min Max
READ CYCLE
t
RC
Read Cycle Time 15 25 35 55 ns
t
AA
Address to Data Valid 15 25 35 55 ns
t
OHA
Output Hold From Address Change 3 3 3 3 ns
t
ACE
CE LOW to Data Valid 15 25 35 55 ns
t
DOE
OE LOW to Data Valid 10 15 20 25 ns
t
LZOE
[10,11,12]
OE Low to Low Z 3 3 3 3 ns
t
HZOE
[10,11,12]
OE HIGH to High Z 10 15 20 25 ns
t
LZCE
[10,11,12]
CE LOW to Low Z 3 3 3 3 ns
t
HZCE
[10,11,12]
CE HIGH to High Z 10 15 20 25 ns
t
PU
[12]
CE LOW to Power-Up 0 0 0 0 ns
t
PD
[12]
CE HIGH to Power-Down 15 25 35 55 ns
WRITE CYCLE
t
WC
Write Cycle Time 15 25 35 55 ns
t
SCE
CE LOW to Write End 12 20 30 40 ns
t
AW
Address Set-Up to Write End 12 20 30 40 ns
t
HA
Address Hold From Write End 2 2 2 2 ns
t
SA
Address Set-Up to Write Start 0 0 0 0 ns
t
PWE
Write Pulse Width 12 20 25 30 ns
t
SD
Data Set-Up to Write End 10 15 15 20 ns
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