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CY7C199
Document #: 38-05160 Rev. ** Page 7 of 16
Read Cycle No. 2
[13, 14]
Write Cycle No. 1 (WE Controlled)
[10, 15, 16]
Write Cycle No. 2 (CE Controlled)
[10, 15, 16]
Notes:
14. Address valid prior to or coincident with CE
transition LOW.
15. Data I/O is high impedance if OE
= V
IH
.
16. If CE
goes HIGH simultaneously with WE HIGH, the output remains in a high-impedance state.
Switching Waveforms (continued)
50%
50%
DATA VALID
t
RC
t
ACE
t
DOE
t
LZOE
t
LZCE
t
PU
DATA OUT
HIGH IMPEDANCE
IMPEDANCE
ICC
ISB
t
HZOE
t
HZCE
t
PD
OE
CE
HIGH
V
CC
SUPPLY
CURRENT
C199–9
t
HD
t
SD
t
PWE
t
SA
t
HA
t
AW
t
WC
DATA I/O
ADDRESS
CE
WE
OE
t
HZOE
C199–10
DATA
IN
VALID
t
WC
t
AW
t
SA
t
HA
t
HD
t
SD
t
SCE
WE
DATA I/O
ADDRESS
CE
C199–11
DATA
IN
VALID