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CY7C1392BV18, CY7C1992BV18
CY7C1393BV18, CY7C1394BV18
Document #: 38-05623 Rev. *D Page 25 of 31
Switching Waveforms
Figure 5. Read/Write/Deselect Sequence
[26, 27, 28]
K
1234567
8
K
LD
R/W
A
Q
D
C
C#
READ
(burst of 2)
READ
(burst of 2)
READ
(burst of 2)
WRITE
(burst of 2)
WRITE
(burst of 2)
t
KHCH
t
KHCH
NOP
NOP
CQ
CQ#
t
KH
t
KHKH
t
CO
t
KL
t
CYC
t
t
HC
t
SA
t
HA
t
SD
t
HD
t
SD
t
HD
t
CLZ
t
DOH
SC
t
KH
t
KHKH
t
KL
t
CYC
t
CQD
t
CCQO
t
CQOH
t
CCQO
t
CQOH
DON’T CARE UNDEFINED
A0 A1 A2
A3 A4
D20 D21 D30 D31
Q40
Q11Q10
Q41
Q00
Q01
t
CQDOH
t
CHZ
Notes
26. Q00 refers to output from address A0. Q01 refers to output from the next internal burst address following A0, that is, A0+1.
27. Outputs are disabled (High-Z) one clock cycle after a NOP.
28. In this example, if address A4 = A3, then data Q40 = D30 and Q41 = D31. Write data is forwarded immediately as read results. This note applies to the whole diagram.
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